;-------------------------------------------------------------------------- ; ; ; PEEDI sample target configuration file ; ; Ronetix ; ; Supported devices : Dualcore DCIC9907 ; www.dualcore.com ; ; Revision : 1.4 ; ; Date : August 25, 2006 ; ; The file is delivered "AS IS" without warranty or condition of any ; kind, either express, implied or statutory. This includes without ; limitation any warranty or condition with respect to merchantability or ; fitness for any particular purpose, or against the infringements of ; intellectual property rights of others. ; ;-------------------------------------------------------------------------- ;-------------------------------------------------------------------------- ; The following section contains licenses that are required for PEEDI to ; operate. These licenses must be filled before using this file. ; The [LICENSE] section may contain license keys for one or more PEEDIs. ; ; Example: ; [LICENSE] ; KEY = UPDATE_24MAY2010, 1111-1111-1111-1 ; KEY = XXXXX, 2222-2222-2222-2 ; ; The [LICENSE] section may point to an external file which contains ; license keys for one or more PEEDIs. The external file must include ; the text [LICENSE] followed by all keys. ; ; Example: ; [LICENSE] ; FILE = tftp://192.168.3.1/license.txt ; or ; FILE=eep:license.txt ; or ; FILE = ftp://user:password@192.168.3.1/license.txt ; ; ; PEEDI is shipped with license keys stored in "eep:license.txt" and ; printed on a label on the bottom side of PEEDI. ; [LICENSE] FILE=eep:license.txt ;-------------------------------------------------------------------------- [DEBUGGER] PROTOCOL = gdb_remote ; gdb remote REMOTE_PORT = 2000 ; TCP/IP port [TARGET] PLATFORM = ARM ; platform is ARM [PLATFORM_ARM] JTAG_CHAIN = 4,4 ; list of IR length of all TAP controller in JTAG chain ;JTAG_CLOCK = adaptive ; use RTCK, recommended by Ronetix JTAG_CLOCK = 10, 16666 ; JTAG Clock in [kHz] - 10kHz for init operations and ; 20MHz for normal work TRST_TYPE = PUSHPULL ; of TRST output: OPENDRAIN or PUSHPULL RESET_TIME = 20 ; length of RESET pulse in ms; 0 means no RESET WAKEUP_TIME = 300 ; time between releasing the reset and starting the jtag communication CORE0 = ARM946E,0 ; TAP is ARM946E-S CPU CORE1 = ARM946E,1 ; TAP is ARM946E-S CPU CORE0_STARTUP_MODE = RESET ; startup mode after reset: ; if RESET than no code is executed after reset ; if STOP,XX then the target executes code for XX period in ms. ; if RUN then the target executes code until stopped by the telnet "halt" command CORE0_BREAKMODE = soft ; default breakpoint mode for the debugger: ; soft - use software breakpoints ; hard - use hardware breakpoints CORE0_BREAK_PATTERN = 0xDFFFDFFF ; software breakpoint pattern CORE0_INIT = INIT_HOST ; init section for board CORE0_FLASH0 = FLASH_AM29LV160 ; FLASH section parameters CORE0_ENDIAN = LITTLE ; core is little endian CORE0_WORKSPACE_ADDR = 0x20000000 ; address of workspace for programmer CORE0_WORKSPACE_LEN = 0x10000 ; length of workspace in bytes CORE0_FILE = "myfile.bin", BIN, 0x20000000 ; default file CORE0_PATH = "tftp://192.168.1.1" ; default path CORE1_STARTUP_MODE = RESET ; startup mode after reset: ; if RESET than no code is executed after reset ; if STOP,XX then the target executes code for XX period in ms. ; if RUN then the target executes code until stopped by the telnet "halt" command CORE1_BREAKMODE = soft ; default breakpoint mode for the debugger: ; soft - use software breakpoints ; hard - use hardware breakpoints CORE1_BREAK_PATTERN = 0xDFFFDFFF ; software breakpoint pattern CORE1_INIT = INIT_CONTROL ; init section for board CORE1_FLASH = FLASH_AM29LV160 ; FLASH section parameters CORE1_ENDIAN = LITTLE ; core is little endian CORE1_WORKSPACE_ADDR = 0x20000000 ; address of workspace for programmer CORE1_WORKSPACE_LEN = 0x10000 ; length of workspace in bytes CORE1_FILE = "myfile.bin", BIN, 0x20000000 ; default file CORE1_PATH = "tftp://192.168.1.1" ; default path [INIT_HOST] mem write 0x7A000000 0x0000C0C0 ; enable control CPU mem write 0x7A00002C 0x03808 ; set PLL, Fout=256MHz wait 20 mem write 0x7A00002C 0x13808 ; enable PLL, Fout=256MHz set region0 0x0000003F ; background region0 set region1 0x0000002B ; region 1 (addr=0x0, 4MB) set dcen 0x00000002 ; data region 1 cacheable set icen 0x00000002 ; instr region 1 cachebale set wben 0x00000002 ; data region 1 bufferable set daccess 0x00000033 ; data region 0/1 full access set iaccess 0x00000033 ; inst region 01/ full access ; disable cache if flash programing ;set control 0x107D ; enable protection and caches set sp 0x20001000 ; set stack pointer [INIT_CONTROL] [FLASH_AM29LV160] CHIP = AM29LV160B/DB ; flash chip CHECK_ID = YES ACCESS_METHOD = AGENT CHIP_WIDTH = 16 CHIP_COUNT = 1 BASE_ADDR = 0x00000 FILE = "tftp:redboot.bin", BIN, 0 AUTO_ERASE = YES [SERIAL] ; serial port configuration BAUD = 115200 STOP_BITS = 1 PARITY = NONE TCP_PORT = 0 ; enable CLI over RS232 ;TCP_PORT = 2023 ; enable serial over TCP/IP [TELNET] PROMPT = "dualcore> " ; telnet prompt ;BACKSPACE = 127 ; comment out for autodetect [DISPLAY] BRIGHTNESS = 20 ; LED indicator brightness VOLUME = 25 ; beeper volume [ACTIONS] ; user defined scripts ;AUTORUN = 2 ; executed on every target connect 1 = erase 2 = prog 3 = dump_ram 4 = dump_flash [erase] ; erase flash flash erase [prog] ; program flash flash prog [dump_ram] ; dump part of RAM memory dump 0x40000000 0x1000 tftp://192.168.2.1/ram.bin [dump_flash] ; dump part of FLASH memory dump 0x00000000 0x1000 tftp://192.168.2.1/flash.bin