;-------------------------------------------------------------------------- ; ; ; PEEDI target configuration file ; ; NPP Mars-Energo ; ; Supported devices : TI OMAP5912 (ARM926E + DSP) ; Board : SD OSK5912 ; ; Revision : 1.0 ; Adopted from CCS's GEL file for OMAP5912 OSK ; - init OMAP5912 OSK from clean state (without u-boot) ; - kernel and rootfs parameters in the flash chapter ; adopted for omap5912osk Angstrom Distribution taken ; from here: ; ; http://www.angstrom-distribution.org/releases/2007.12/images/omap5912osk/ ; and according this notes: ; ; http://ossie.wireless.vt.edu/trac/wiki/OSKNotes ; http://tree.celinuxforum.org/CelfPubWiki/OSK ; ; Date : Jul 8, 2008 ; ; The file is delivered "AS IS" without warranty or condition of any ; kind, either express, implied or statutory. This includes without ; limitation any warranty or condition with respect to merchantability or ; fitness for any particular purpose, or against the infringements of ; intellectual property rights of others. ; ;-------------------------------------------------------------------------- ;-------------------------------------------------------------------------- ; The following section contains licenses that are required for PEEDI to ; operate. These licenses must be filled before using this file. ; The [LICENSE] section may contain license keys for one or more PEEDIs. ; ; Example: ; [LICENSE] ; KEY = UPDATE_24MAY2010, 1111-1111-1111-1 ; KEY = XXXXX, 2222-2222-2222-2 ; ; The [LICENSE] section may point to an external file which contains ; license keys for one or more PEEDIs. The external file must include ; the text [LICENSE] followed by all keys. ; ; Example: ; [LICENSE] ; FILE = tftp://192.168.3.1/license.txt ; or ; FILE=eep:license.txt ; or ; FILE = ftp://user:password@192.168.3.1/license.txt ; ; ; PEEDI is shipped with license keys stored in "eep:license.txt" and ; printed on a label on the bottom side of PEEDI. ; [LICENSE] FILE=eep:license.txt ;-------------------------------------------------------------------------- [DEBUGGER] PROTOCOL = gdb_remote ; gdb_remote or adp REMOTE_PORT = 2000 ; TCP/IP port [TARGET] PLATFORM = ARM [PLATFORM_ARM] JTAG_CHAIN = 8, 4, 38 ; list of IR lenghts of all TAP controller in JTAG chain JTAG_CLOCK = 100, 10000 ; JTAG Clock in [kHz] - 100kHz jtag clock for init ; operations and 10MHz for normal work ; Valid range: 5 - 33000 TRST_TYPE = PUSHPULL ; type of TRST output: OPENDRAIN or PUSHPULL RESET_TIME = 20 ; lenght of RESET pulse in ms; 0 means no RESET TIME_AFTER_RESET = 200 CORE0 = DAVINCI, 1 ; TAP 0 is ARM926E CPU CORE0_STARTUP_MODE = RESET ; startup mode after reset: ; if RESET than no code is executed after reset ; if STOP,XX then the target executes code ; for XX period in ms. ; if RUN then the target executes code until ; stopped by the telnet "halt" command CORE0_BREAKMODE = hard ; default breakpoint mode for the debugger: ; soft - use software breakpoints ; hard - use hardware breakpoints CORE_BREAK_PATTERN = 0xDFFFDFFF ; software breakpoint pattern CORE0_INIT = INIT_OSK5912 ; init section CORE0_FLASH0 = U-BOOT CORE0_FLASH1 = KERNEL CORE0_FLASH2 = ROOTFS CORE0_ENDIAN = little CORE0_WORKSPACE_ADDR = 0x10000000 ; start address of workspace for flash programmer CORE0_WORKSPACE_LEN = 0x10000 ; length of workspace in bytes (64Kb) CORE0_PATH = "tftp://192.168.3.1" ; default path ;CORE0_PATH = "card://" ; default path CORE0_FILE = "test.bin", BIN, 0x10000000 ;------------------------------------------------- ; Init for SD OSK5912 board (CPU: OMAP5912) ;------------------------------------------------- [INIT_OSK5912] ; reset ARM set cpsr 0x000000D3 ; set supervisor mode set pc 0x00000000 set control 0x00050078 ; CP15 Control : disable caches ; disable ARM9 Watchdog Timer mem w16 0xFFFEC808 0x00F5 ; convert WD timer into GP timer mem w16 0xFFFEC808 0x00A0 ; ; setup DPLL for 96MHz freq mem or16 0xFFFECE08 0x4 ; enable ARM peripheral clock mem w16 0xFFFECE14 0x1 ; release OMAP CLKM reset mem w16 0xFFFECF00 0x2090 ; DPLL lock at 12MHz wait 150 ; wait until frequency is locked mem w16 0xFFFECE18 0x0 ; clocking mode : fully synchronous mem w16 0xFFFECE00 0x100A ; set the clock divisor for frequency 96MHz mem w16 0xFFFECF00 0x2413 ; set the DPLL for new frequency mem w16 0xFFFECE04 0x0 ; ; Setup TIPB (peripheral bus) mem w32 0xFFFEC900 0x0003FF2C ; set access width mem w16 0xFFFECA00 0xFF22 ; ARM private bus mem w16 0xFFFED300 0xFF22 ; ARM public bus ; configure EMIFS (slow external memory: flash) mem w32 0xFFFECC10 0x0000FFF3 ; EMIFS CS0 configuration mem w32 0xFFFECC14 0x0000AAA0 ; EMIFS CS1 configuration mem w32 0xFFFECC18 0x0000FFF3 ; EMIFS CS3 configuration mem w32 0xFFFECC1C 0x00003361 ; EMIFS CS3 configuration mem r32 0xFFFECC0C ; read EMIFS_CONFIG mem w16 0x00000000 0xFF ; reset flash to Read Array mode ; configure EMIFF (fast external memory: SDRAM-Mobile DDR) mem w32 0xFFFECC80 0x00000007 ; SDRAM type : mobile DDR SDRAM in HPHB mode mem w32 0xFFFECC20 0x0014E6FE ; SDRAM config mem w32 0xFFFECC84 0x00000000 ; DDR init : NOP mem w32 0xFFFECC84 0x00000001 ; DDR init : PRECHARGE mem w32 0xFFFECC84 0x00000002 ; DDR init : AUTOREFRESH mem w32 0xFFFECC84 0x00000002 ; DDR init : AUTOREFRESH mem w32 0xFFFECC70 0x00000033 ; DDR init : cas idle 3, page burst 8 mem w32 0xFFFECC78 0x00000000 ; DDR init : self refresh all banks mem w32 0xFFFECCC0 0x00000006 ; DDR init : DDR DDL registers URD mem w32 0xFFFECCCC 0x00000006 ; DDR init : DDR DDL registers LRD mem w32 0xFFFECC64 0x00000006 ; DDR init : DDR DDL registers WRD [U-BOOT] ; auto detect 28F128J3(A) or 28F128P30B CHIP = 28F128J3(A) ; flash chip CHIP = 28F128P30B ; flash chip ACCESS_METHOD = AGENT CHECK_ID = YES ; check chip ID CHIP_WIDTH = 16 ; chip is in 16 bit configuration CHIP_COUNT = 1 ; one chip is used BASE_ADDR = 0x0C000000 FILE = "u-boot.bin", BIN, 0 ; file to program AUTO_ERASE = YES ; erase before program AUTO_LOCK = NO ; lock after program [KERNEL] CHIP = CFI_FLASH ACCESS_METHOD = AGENT CHECK_ID = YES ; check chip ID CHIP_WIDTH = 16 ; chip is in 16 bit configuration CHIP_COUNT = 1 ; one chip is used BASE_ADDR = 0x0C000000 FILE = "uImage.cc", BIN, 0x00040000; file to program AUTO_ERASE = YES ; erase before program AUTO_LOCK = NO ; lock after program [ROOTFS] ; auto detect 28F128J3(A) or 28F128P30B CHIP = 28F128J3(A) ; flash chip CHIP = 28F128P30B ; flash chip ACCESS_METHOD = AUTO ; program method auto CHECK_ID = YES ; check chip ID CHIP_WIDTH = 16 ; chip is in 16 bit configuration CHIP_COUNT = 1 ; one chip is used BASE_ADDR = 0x00000000 ; chip is mapped at 0x00000000 FILE = "fs.jffs2", BIN, 0x00240000; file to program AUTO_ERASE = YES ; erase before program AUTO_LOCK = NO ; lock after program [SERIAL] BAUD = 115200 STOP_BITS = 1 PARITY = NONE TCP_PORT = 0 ; enable CLI over RS232 ;TCP_PORT = 2023 ; enable serial over TCP/IP [TELNET] PROMPT = "OMAP5912osk> " ; telnet prompt ;BACKSPACE = 127 ; comment out for autodetect [DISPLAY] BRIGHTNESS = 20 ; LED indicator brightness VOLUME = 25 ; beeper volume [ACTIONS] ; user defined scripts ;AUTORUN = 2 ; executed on every target connect 1 = erase 2 = prog 3 = dump_ram 4 = dump_flash [erase] ; erase flash flash erase [prog] ; program flash flash set 0 flash prog ; program U-BOOT flash set 1 flash prog ; program kernel flash set 2 flash prog ; program rootfs [dump_ram] ; dump part of RAM memory dump 0x10000000 0x0100 tftp://192.168.1.30/ram.bin [dump_flash] ; dump part of RAM memory dump 0x00020000 0x20000 tftp://192.168.1.30/flash.bin