;------------------------------------------------------------------------------- ; ; avr32ap.cfg ; ----------- ; ; PEEDI target configuration file for ICnova AP7000 evaluation board ; ; ; Ronetix ; ; Supported devices : AT32AP7000 ; ; Revision : 1.0 ; ; Date : June 3, 2009 ; ; The file is delivered "AS IS" without warranty or condition of any ; kind, either express, implied or statutory. This includes without ; limitation any warranty or condition with respect to merchantability or ; fitness for any particular purpose, or against the infringements of ; intellectual property rights of others. ; ;------------------------------------------------------------------------------- ;-------------------------------------------------------------------------- ; The following section contains licenses that are required for PEEDI to ; operate. These licenses must be filled before using this file. ; The [LICENSE] section may contain license keys for one or more PEEDIs. ; ; Example: ; [LICENSE] ; KEY = UPDATE_24MAY2010, 1111-1111-1111-1 ; KEY = XXXXX, 2222-2222-2222-2 ; ; The [LICENSE] section may point to an external file which contains ; license keys for one or more PEEDIs. The external file must include ; the text [LICENSE] followed by all keys. ; ; Example: ; [LICENSE] ; FILE = tftp://192.168.3.1/license.txt ; or ; FILE=eep:license.txt ; or ; FILE = ftp://user:password@192.168.3.1/license.txt ; ; ; PEEDI is shipped with license keys stored in "eep:license.txt" and ; printed on a label on the bottom side of PEEDI. ; [LICENSE] FILE=eep:license.txt ;-------------------------------------------------------------------------- [DEBUGGER] REMOTE_PORT = 2000 ; TCP/IP port [TARGET] PLATFORM = AVR32 ; platform is [PLATFORM_AVR32] JTAG_CHAIN = 5 ; list of IR lenght of all TAP controller in JTAG chain JTAG_CLOCK = 100, 8000 ; JTAG Clock in [kHz] - 100kHz jtag clock for init operations and 8MHz for normal work TRST_TYPE = PUSHPULL ; type of TRST output: OPENDRAIN or PUSHPULL RESET_TIME = 100 ; lenght of RESET pulse in ms; 0 means no RESET WAKEUP_TIME = 100 CORE0 = AVR32AP7 ; TAP is AVR32AP CPU CORE0_STARTUP_MODE = RESET CORE0_BREAKMODE = SOFT ; breakpoint mode: ; soft - software breakpiont ; hard - use hardware breakpoints instead of software CORE0_USE_BLOCK_ACCESS = 0x24000000, 0x8000 ; ADDRESS, LENGHT CORE0_INIT = INIT_AVR32AP ; init section for FLASH programming ;CORE0_INIT = INIT_LINUX ; init section for Linux debugging CORE0_FLASH0 = FLASH_AVR32AP ; flash section parameters CORE0_ENDIAN = BIG ; core is little endian CORE0_WORKSPACE = 0x24000000, 0x8000 ; start address of workspace for flash programmer CORE0_PATH = "tftp://192.168.3.60" [INIT_AVR32AP] ; Init SMC for NCS0(FLASH) ; needs to be run before we increase the clock frequency. mem write32 0xFFF0340C 0x00031103 mem write32 0xFFF03408 0x000c000d mem write32 0xFFF03404 0x0b0a0906 mem write32 0xFFF03400 0x00010002 ; Initialize the PLL0 ->OSC0-20Mh, DIV=1, MILL=7, supress cucles = 16 mem write32 0xFFF00020 0x10060011 ; Wait for Lock wait 100 ; Set up clocks for the CPU and all peripheral buses ->CPUDIV=0, HSBDIV=1, PBADIV=2, PBBDIV=1 mem write32 0xFFF00004 0x80818000 ; Use PLL0 as main clock mem write32 0xFFF00000 0x02 ; Some delay wait 100 ; Init Pin multiplexor - PIOE mem write32 0xFFE03804 0x0400FFFF ;PDR mem read32 0xFFE03808 mem write32 0xFFE03860 0x0400FFFF ;PUDR mem write32 0xFFE03870 0x0400FFFF ;ASR mem read32 0xFFE03878 ; Set HMATRIX SFR4 register->disable Pull-up, CS1 is for SDRAM mem write32 0xFFF00902 0x0102 ; Init SDRAM controller and SDRAM chip[s] mem write32 0xFFF03800+0x0008 0x55227279 ; Send a NOP to turn on the clock (necessary on some chips) mem write32 0xFFF03800 0x01 mem read32 0xFFF03800 mem write32 0x10000000 0x00 wait 1 ; Send a NOP to turn on the clock (necessary on some chips) mem write32 0xFFF03800 0x01 mem read32 0xFFF03800 mem write32 0x10000000 0x00 wait 1 ; Initialization sequence for SDRAM, from the data sheet: ; 1. A minimum pause of 200 us is provided to precede any ; signal toggle. wait 1 ; 2. A Precharge All command is issued to the SDRAM mem write32 0xFFF03800 0x02 mem read32 0xFFF03800 mem write32 0x10000000 0x00 ; Send a NOP mem write32 0xFFF03800 0x01 mem read32 0xFFF03800 mem write32 0x10000000 0x00 wait 1 ; 3. Eight auto-refresh (CBR) cycles are provided mem write32 0xFFF03800 0x04 mem read32 0xFFF03800 ; Send a NOP mem write32 0xFFF03800 0x01 mem read32 0xFFF03800 mem write32 0x10000000 0x00 wait 1 mem write32 0xFFF03800 0x04 mem read32 0xFFF03800 ; Send a NOP mem write32 0xFFF03800 0x01 mem read32 0xFFF03800 mem write32 0x10000000 0x00 wait 1 mem write32 0x10000000 0x00 mem write32 0x10000000 0x00 mem write32 0x10000000 0x00 mem write32 0x10000000 0x00 mem write32 0x10000000 0x00 mem write32 0x10000000 0x00 mem write32 0x10000000 0x00 mem write32 0x10000000 0x00 ; 4. A mode register set (MRS) cycle is issued to program ; SDRAM parameters, in particular CAS latency and burst ; length. ; The address will be chosen by the SDRAMC automatically; we ; just have to make sure BA[1:0] are set to 0. mem write32 0xFFF03800 0x03 mem read32 0xFFF03800 mem write32 0x10000030 0x00 ; 5. The application must go into Normal Mode, setting Mode ; to 0 in the Mode Register and performing a write access ; at any location in the SDRAM. ; mem read32 0xFFF03800 mem write32 0xFFF03800 0x00 mem read32 0xFFF03800 mem write32 0x10000000 0x00 ; 6. Write refresh rate into SDRAMC refresh timer count ; register (refresh rate = timing between refresh cycles). ; SDRAMC_BUS_HZ = PLL0 / PBBdevider Mhz; ; 7.81 us (781 * (PBB_hz / 1000)) / 100000) ; OR ; 15.6 us (TR, (156 * (PBB_hz / 1000)) / 10000) mem write32 0xFFF03804 0x444 [INIT_LINUX] break add hard 0x90000398 ; kernel break address got by 'nm vmlinux | grep start_kernel' go wait 20000 stop break del all beep 500 20 [FLASH_AVR32AP] CHIP = CFI_FLASH ACCESS_METHOD = AGENT ; program method ;ACCESS_METHOD = DIRECT ; program method CHECK_ID = YES ; check chip ID CHIP_WIDTH = 16 ; chip is in 16 bit configuration CHIP_COUNT = 1 ; one chip is used BASE_ADDR = 0xA0000000 ; using uncached access to the FLASH FILE = "test256k.bin", bin, 0xA0000000 AUTO_ERASE = NO ; erase before program AUTO_LOCK = NO ; lock after program [SERIAL] ; serial port configuration BAUD = 115200 STOP_BITS = 1 PARITY = NONE TCP_PORT = 0 [TELNET] PROMPT = "AVR32AP> " ; telnet prompt ;BACKSPACE = 127 ; comment out for autodetect [DISPLAY] BRIGHTNESS = 20 ; LED indicator brightness VOLUME = 25 ; zummer volume [ACTIONS] ; user defined scripts 1 = erase 2 = prog [erase] ; erase flash flash erase [prog] ; program flash flash program