;-------------------------------------------------------------------------- ; ; ; PEEDI sample target configuration file ; ; Ronetix ; ; Supported devices : FreeScale MCF5282 ; Board : Axman M5282LITE evaluation board ; ; Revision : 1.1 ; ; Date : April 12, 2010 ; ; The file is delivered "AS IS" without warranty or condition of any ; kind, either express, implied or statutory. This includes without ; limitation any warranty or condition with respect to merchantability or ; fitness for any particular purpose, or against the infringements of ; intellectual property rights of others. ; ;-------------------------------------------------------------------------- ;-------------------------------------------------------------------------- ; The following section contains licenses that are required for PEEDI to ; operate. These licenses must be filled before using this file. ; The [LICENSE] section may contain license keys for one or more PEEDIs. ; ; Example: ; [LICENSE] ; KEY = UPDATE_24MAY2010, 1111-1111-1111-1 ; KEY = XXXXX, 2222-2222-2222-2 ; ; The [LICENSE] section may point to an external file which contains ; license keys for one or more PEEDIs. The external file must include ; the text [LICENSE] followed by all keys. ; ; Example: ; [LICENSE] ; FILE = tftp://192.168.3.1/license.txt ; or ; FILE=eep:license.txt ; or ; FILE = ftp://user:password@192.168.3.1/license.txt ; ; ; PEEDI is shipped with license keys stored in "eep:license.txt" and ; printed on a label on the bottom side of PEEDI. ; [LICENSE] FILE=eep:license.txt ;-------------------------------------------------------------------------- [DEBUGGER] PROTOCOL = gdb_remote ; gdb remote REMOTE_PORT = 2000 ; TCP/IP port [TARGET] PLATFORM = COLDFIRE ; platform is ColdFire [PLATFORM_COLDFIRE] BDM_CLOCK = adaptive_8 ; BDM Clock is CLKOUT/8 RESET_TIME = 100 ; lenght of RESET pulse in ms; 0 means no RESET TIME_AFTER_RESET = 500 CORE = MCF528x ; CPU is Coldfire V2 CORE_STARTUP_MODE = reset CORE_BREAKMODE = soft ; soft - software breakpiont ; hard - use hardware breakpoints instead of software CORE_INIT = INIT_COLDFIRE ; init section CORE_FLASH0 = FLASH_MCF5282 ; flash section parameters CORE_FLASH1 = FLASH_M29W160DB ; flash section parameters CORE_WORKSPACE_ADDR = 0x200 ; start address of workspace for flash programmer CORE_WORKSPACE_LEN = 0x10000 ; length of workspace in bytes CORE_FILE = "myfile.bin", BIN, 0 ; default file CORE_PATH = "tftp://192.168.3.1" ; default path [INIT_COLDFIRE] set VBR 0 set RAMBAR 0x20000001 ; Internal SRAM at 0x20000000 mem write16 0x40140000 0x000E ; Disable watchdog timer mem write16 0x40120000 0x2000 ; Set PLL to 64MHz wait 100 ; Init Flash Module set FLASHBAR 0xF0000021 ; Internal Flash at 0xF0000000 ;mem write8 0x401D0002 0x4A ; CFMCLKD : Flash clock divider for 32MHz ;mem write8 0x401D0002 0x54 ; CFMCLKD : Flash clock divider for 64MHz ;mem write32 0x401D0010 0x00000000 ; CFMPROT : disable flash protection ; Init Parallel Port mem write8 0x40100050 0xC0 ; PBCDPAR: Port B,C,D for D[23:0] ; Init Chip-Select Module mem write16 0x40000080 0xFFE0 ; CSAR0: Flash at 0xFFE00000 mem write16 0x4000008A 0x1980 ; CSCR0: Flash 5 waits, 16bit, mem write32 0x40000084 0x001F0001 ; CSMR0: Flash 2MB, R/W, valid ; Init SDRAM Controller mem write16 0x40000040 0x023c ; DCR: mem write32 0x40000048 0x00001300 ; DACR0: base=0x00000000 mem write32 0x4000004C 0x00FC0001 ; DMR0: mask=16MB; enable mem write32 0x40000048 0x00001308 ; DACR0: Initiate Precharge All Command mem write32 0x00000000 0xa5a59696 ; Execute PALL command mem write32 0x40000048 0x00009300 ; DACR0: enable refresh wait 100 ; Delay for refresh mem write32 0x40000048 0x00009340 ; DACR0: Initiate Mode Register Set Command mem write32 0x00000400 0xa5a59696 ; Execute MRS command [FLASH_M29W160DB] CHIP = M29W160B/D/EB ; flash chip ACCESS_METHOD = agent ; program method CHECK_ID = YES ; check chip ID CHIP_WIDTH = 16 ; chip is in 16 bit configuration CHIP_COUNT = 1 ; one chip is used BASE_ADDR = 0xFFE00000 ; chip is mapped at 0xFFE00000 FILE = "tftp:myfile.bin" bin 0xFFE00000 AUTO_ERASE = YES ; erase before program AUTO_LOCK = NO ; lock after program [FLASH_MCF5282] CHIP = MCF5282 ; internal flash BASE_ADDR = 0xF0000000 ; chip is mapped at 0xF000000 IPS_BASE = 0x40000000 CPU_CLOCK = 64000 FILE = "tftp:myfile.bin" bin 0xF0000000 AUTO_ERASE = YES ; erase before program [SERIAL] ; serial port configuration BAUD = 115200 STOP_BITS = 1 PARITY = NONE TCP_PORT = 0 ; enable CLI over RS232 ;TCP_PORT = 2023 ; enable serial over TCP/IP [TELNET] PROMPT = "mcf5282> " ; telnet prompt ;BACKSPACE = 127 ; comment out for autodetect [DISPLAY] BRIGHTNESS = 20 ; LED indicator brightness VOLUME = 25 ; zummer volume [ACTIONS] ; user defined scripts ;AUTORUN = 2 ; executed on every target connect 1 = erase 2 = prog 3 = dump_ram 4 = dump_flash [erase] ; erase flash flash erase [prog] ; program flash flash prog [dump_ram] ; dump part of RAM memory dump 0x00000000 0x01000 tftp://192.168.1.1/ram.bin [dump_flash] ; dump part of FLASH memory dump 0xFFE00000 0x10000 tftp://192.168.1.1/flash.bin