;-------------------------------------------------------------------------- ; ; ; PEEDI sample target configuration file ; ; Ronetix GmbH ; ; Supported devices : CORTEX-A7 ; Supported board : Aspeed Tech AST2600 ; ; SRAM at 0x10000000 ; DDR4 at 0x80000000 ; ; Date : Nov 12, 2019 ; ; Note: ; ; The file is delivered "AS IS" without warranty or condition of any ; kind, either express, implied or statutory. This includes without ; limitation any warranty or condition with respect to merchantability or ; fitness for any particular purpose, or against the infringements of ; intellectual property rights of others. ; ;-------------------------------------------------------------------------- ;-------------------------------------------------------------------------- ; The following section contains licenses that are required for PEEDI to ; operate. These licenses must be filled before using this file. ; The [LICENSE] section may contain license keys for one or more PEEDIs. ; ; Example: ; [LICENSE] ; KEY = UPDATE_24MAY2013, 1111-1111-1111-1 ; KEY = XXXXX, 2222-2222-2222-2 ; ; The [LICENSE] section may point to an external file which contains ; license keys for one or more PEEDIs. The external file must include ; the text [LICENSE] followed by all keys. ; ; Example: ; [LICENSE] ; FILE = tftp://192.168.1.1/license.txt ; or ; FILE=eep:license.txt ; or ; FILE = ftp://user:password@192.168.1.1/license.txt ; ; ; PEEDI is shipped with license keys stored in "eep:license.txt" and ; printed on a label on the bottom side of PEEDI. ; [LICENSE] FILE = eep:license.txt ;-------------------------------------------------------------------------- [DEBUGGER] PROTOCOL = gdb_remote ; gdb remote REMOTE_PORT = 2000 ; TCP/IP port [TARGET] PLATFORM = Cortex-A ; platform is Cortex-A [PLATFORM_Cortex-A] JTAG_CHAIN = 4 ; list of TAP controllers in the JTAG chain JTAG_CLOCK = 8000 ; JTAG Clock in [kHz] TRST_TYPE = PUSHPULL ; type of TRST output: OPENDRAIN or PUSHPULL RESET_TIME = 20 ; length of RESET pulse in ms WAKEUP_TIME = 20 ; delay after power up TIME_AFTER_RESET = 600 ; delay after RST is released VERBOSE_INFO = 1 ; print info if CORE0_DEBUG_ADDR is not defined CORE0_APSEL = 0 ; CORE0 - 0x94030000 ; CORE1 - 0x94032000 ; CrossTrigegr found at 0x94042000, but doesn't work CORE0_DEBUG_ADDR = 0x94030000 ; CoreSight Debug component. CORE0 = Cortex-A, 0, 0x5BA00477 ; TAP is Cortex-A CPU CORE0_STARTUP_MODE = RESET ; stop the core immediately after reset CORE0_ENDIAN = LITTLE ; core is little endian CORE0_BREAKMODE = SOFT ; breakpoint mode CORE0_INIT = INIT_AST2600 CORE0_WORKSPACE = 0x10000000, 0x8000 ; SRAM CORE0_FLASH0 = NOR_FLASH CORE0_FLASH1 = SPI_FLASH CORE0_PATH = "tftp://192.168.3.60" CORE0_FILE = "test.bin", BIN, 0x20000000 [INIT_AST2600] [NOR_FLASH] [SPI_FLASH] [SERIAL] ; serial port configuration BAUD = 115200 STOP_BITS = 1 PARITY = NONE TCP_PORT = 0 [TELNET] PROMPT = "ast2600> " ; telnet prompt ;BACKSPACE = 127 ; comment out for autodetect [DISPLAY] BRIGHTNESS = 20 ; LED indicator brightness VOLUME = 25 ; beeper volume [ACTIONS] ; user defined scripts ;AUTORUN = 2 ; executed on every target connect 1 = erase 2 = prog [erase] ; erase flash flash erase [prog] ; program flash flash prog