;-------------------------------------------------------------------------- ; ; ; PEEDI sample target configuration file ; ; Ronetix ; ; Supported devices : LPC1766 ; ; Revision : 1.2 ; ; Date : November 25, 2011 ; ; The file is delivered "AS IS" without warranty or condition of any ; kind, either express, implied or statutory. This includes without ; limitation any warranty or condition with respect to merchantability or ; fitness for any particular purpose, or against the infringements of ; intellectual property rights of others. ; ;-------------------------------------------------------------------------- ;-------------------------------------------------------------------------- ; The following section contains licenses that are required for PEEDI to ; operate. These licenses must be filled before using this file. ; The [LICENSE] section may contain license keys for one or more PEEDIs. ; ; Example: ; [LICENSE] ; KEY = UPDATE_24MAY2010, 1111-1111-1111-1 ; KEY = XXXXX, 2222-2222-2222-2 ; ; The [LICENSE] section may point to an external file which contains ; license keys for one or more PEEDIs. The external file must include ; the text [LICENSE] followed by all keys. ; ; Example: ; [LICENSE] ; FILE = tftp://192.168.3.1/license.txt ; or ; FILE=eep:license.txt ; or ; FILE = ftp://user:password@192.168.3.1/license.txt ; ; ; PEEDI is shipped with license keys stored in "eep:license.txt" and ; printed on a label on the bottom side of PEEDI. ; [LICENSE] FILE = eep://license.txt ;-------------------------------------------------------------------------- [DEBUGGER] PROTOCOL = gdb_remote ; gdb remote REMOTE_PORT = 2000 ; TCP/IP port [TARGET] PLATFORM = CortexM3 ; use JTAG for debug ;PLATFORM = CortexM3_SWD ; use SWD for debug [PLATFORM_CortexM3] JTAG_CHAIN = 4 ; list of TAP controllers in the JTAG chain JTAG_CLOCK = 100, 2000 ; JTAG Clock in [kHz] TRST_TYPE = OPENDRAIN ; type of TRST output: OPENDRAIN or PUSHPULL RESET_TIME = 0 ; length of RESET pulse in ms; 0 means no RESET CORE0 = CortexM3 ; TAP is CortexM3 CPU CORE0_STARTUP_MODE = RESET ; stop the core immediately after reset CORE0_ENDIAN = LITTLE ; core is little endian CORE0_BREAKMODE = HARD, 0, 0x40000 ; breakpoint mode CORE0_WORKSPACE = 0x10000000, 0x2000 CORE0_INIT = INIT_LPC ; init section for AT91SAM7S64 CORE0_FLASH = FLASH_LPC ; FLASH section parameters [PLATFORM_CortexM3_SWD] SWD_CLOCK = 100, 20000 ; SWD Clock in [kHz] TRST_TYPE = OPENDRAIN ; type of TRST output: OPENDRAIN or PUSHPULL RESET_TIME = 0 ; length of RESET pulse in ms; 0 means no RESET CORE0 = CortexM3 ; TAP is CortexM3 CPU CORE0_STARTUP_MODE = RESET ; stop the core immediately after reset CORE0_ENDIAN = LITTLE ; core is little endian CORE0_BREAKMODE = HARD, 0, 0x40000 ; breakpoint mode CORE0_WORKSPACE = 0x10000000, 0x2000 CORE0_INIT = INIT_LPC ; init section for AT91SAM7S64 CORE0_FLASH = FLASH_LPC ; FLASH section parameters ;CORE0_SWO = DWT, 10000 ;CORE0_SWO = 0, 2001 ;CORE0_SWO = 1, 10002 ;CORE0_SWO = 2, 10003 ;CORE0_PROFILING = 0, 0x40000, 0x100000 [INIT_LPC] mem write 0x400FC040 0x1; SYSMEMREMAP: map user FLASH at addr 0 ; Enable main oscillator memory write 0x400FC1A0 0x00000020 wait 20 ; Set CCLK to 12Mhz using the external oscillator as the source memory write 0x400FC080 0x00000000 ;PLLCON: memory write 0x400FC084 0x00000000 ;PLLCFG: memory write 0x400FC08C 0x000000AA ;PLLFEED: memory write 0x400FC08C 0x00000055 ;PLLFEED: wait 20 memory write 0x400FC104 0x00000000 ;CCLKCFG = Divide by 1 memory write 0x400FC10C 0x00000001 ;CLKSRCSEL = Used main oscillator wait 20 [FLASH_LPC] CHIP = LPC1700 ; flash chip SET_VECTORS_CHECKSUM = YES ; auto set checksum at address 0x1C CPU_CLOCK = 12000 ; CPU clock is 12 MHz FILE = "myfile.bin", BIN, 0 ; file to program AUTO_ERASE = NO ; erase before program [SERIAL] ; serial port configuration BAUD = 115200 STOP_BITS = 1 PARITY = NONE TCP_PORT = 0 [TELNET] PROMPT = "lpc> " ; telnet prompt ;BACKSPACE = 127 ; comment out for autodetect [DISPLAY] BRIGHTNESS = 20 ; LED indicator brightness VOLUME = 25 ; beeper volume [ACTIONS] ; user defined scripts ;AUTORUN = 2 ; executed on every target connect 1 = erase 2 = prog 3 = dump_ram 4 = dump_flash [erase] ; erase flash flash erase [prog] ; program flash flash prog [dump_ram] ; dump RAM memory dump 0x20000000 0x5000 tftp://192.168.0.1/ram.bin [dump_flash] ; dump FLASH memory dump 0x08000000 0x20000 tftp://192.168.0.1/flash.bin