;-------------------------------------------------------------------------- ; PEEDI target configuration file ; ; Ronetix GmbH ; ; Supported devices : Renesas RA4M3 ; Supported board : Renesas EK-RA4M3 ; ; Revision : 1.0 ; ; Date : April 26, 2021 ; ; The file is delivered "AS IS" without warranty or condition of any ; kind, either express, implied or statutory. This includes without ; limitation any warranty or condition with respect to merchantability or ; fitness for any particular purpose, or against the infringements of ; intellectual property rights of others. ; ;-------------------------------------------------------------------------- ;-------------------------------------------------------------------------- ; The following section contains licenses that are required for PEEDI to ; operate. These licenses must be filled before using this file. ; The [LICENSE] section may contain license keys for one or more PEEDIs. ; ; Example: ; [LICENSE] ; KEY = UPDATE_24MAY2013, 1111-1111-1111-1 ; KEY = XXXXX, 2222-2222-2222-2 ; ; The [LICENSE] section may point to an external file which contains ; license keys for one or more PEEDIs. The external file must include ; the text [LICENSE] followed by all keys. ; ; Example: ; [LICENSE] ; FILE = tftp://192.168.1.1/license.txt ; or ; FILE=eep:license.txt ; or ; FILE = ftp://user:password@192.168.1.1/license.txt ; ; ; PEEDI is shipped with license keys stored in "eep:license.txt" and ; printed on a label on the bottom side of PEEDI. ; [LICENSE] FILE = eep:license.txt ;-------------------------------------------------------------------------- [DEBUGGER] PROTOCOL = gdb_remote ; gdb remote REMOTE_PORT = 2000 ; TCP/IP port [TARGET] PLATFORM = Cortex [PLATFORM_Cortex] JTAG_CHAIN = 4 ; list of TAP controllers in the JTAG chain JTAG_CLOCK = 100, 10000 ; JTAG Clock in [kHz] TRST_TYPE = PUSHPULL ; type of TRST output: OPENDRAIN or PUSHPULL RESET_TIME = 20 ; length of RESET pulse in ms WAKEUP_TIME = 100 ; length of RESET pulse in ms; 0 means no RESET CORE0 = Cortex-M CORE0_STARTUP_MODE = RESET ; stop the core immediately after reset CORE0_ENDIAN = LITTLE ; core is little endian CORE0_BREAKMODE = SOFT ; breakpoint mode CORE0_INIT = INIT_RA4M3 CORE0_WORKSPACE = 0x20000000, 0x8000 ; address, lenght in bytes CORE0_FLASH0 = FLASH_RA ; Default path to be used if only a file name (without the full path) is ; provided to a PEEDI command or for the FILE parameter in the Flash sections ; Examples: ; In a console: ; "flash prog tftp://192.168.1.1/image.elf" ; is equal to ; "flash prog image.elf" ; ; In a Flash Profile: ; FILE="tftp://192.168.1.1/image.bin", BIN, 0 ; is equal to ; FILE="image.bin", BIN, 0 ; CORE0_PATH = "tftp://192.168.3.60" CORE0_FILE = "test.bin", BIN, 0x20000000 [INIT_RA4M3] ; Flash clock - 50MHz ; System clock - 100MHz mem w16 0x4001E3FE 0xA503 ; Unlock CGC and LPM protection registers mem w8 0x4001E413 0x30 ; Configure main oscillator drive 8MHz mem w8 0x4001E0A2 9 ; Set the main oscillator wait time mem w8 0x4001E481 0 ; SOMCR mem w8 0x4001E480 0 ; SOSCCR mem w8 0x4001E032 0 ; MOSCCR - Start PLL source clock mem w16 0x4001E028 0x3102 ; PLLCCR - Configure the PLL wait 20 mem w8 0x4001E02A 0 ; PLLCR - PLL is operating wait 20 mem w8 0x4001E026 5 ; SCKSCR - Set the system source clock mem w32 0x4001E020 0x21021221 ; SCKDIVCR mem w8 0x4001E3FE 0xA500 ; R_SYSTEM->PRCR - Lock CGC and LPM mem w8 0x4001C11C 1 ; FLWT - 1 flash wait state mem w16 0x407FE0E4 0x1E32 [FLASH_RA] CHIP = RENESAS_RA FILE = "test32k.bin", 0x0 ; file to program ; After erasing of Data Flash "mem read" shows garbage, ; but the flash can be programmed correctly. ; After programming of Data Flash "mem read" shows correct data ;DATA_FLASH = YES ; enable programming of Data Flash [SERIAL] BAUD = 115200 STOP_BITS = 1 PARITY = NONE TCP_PORT = 0 [TELNET] PROMPT = "ra4m3> " ; telnet prompt [DISPLAY] BRIGHTNESS = 20 ; LED indicator brightness VOLUME = 25 ; beeper volume [ACTIONS] ; user defined scripts ;AUTORUN = 2 ; executed on every target connect 1 = erase 2 = prog [erase] ; erase flash flash erase [prog] ; program flash flash prog