;-------------------------------------------------------------------------- ; ; ; PEEDI configuration file for STM32 with bit bang SPI ; ; Ronetix GmbH ; ; Supported devices : STM32F103 ; ; Revision : 1.2 ; ; Date : April 11, 2014 ; ; The file is delivered "AS IS" without warranty or condition of any ; kind, either express, implied or statutory. This includes without ; limitation any warranty or condition with respect to merchantability or ; fitness for any particular purpose, or against the infringements of ; intellectual property rights of others. ; ;-------------------------------------------------------------------------- ;-------------------------------------------------------------------------- ; The following section contains licenses that are required for PEEDI to ; operate. These licenses must be filled before using this file. ; The [LICENSE] section may contain license keys for one or more PEEDIs. ; ; Example: ; [LICENSE] ; KEY = UPDATE_24MAY2010, 1111-1111-1111-1 ; KEY = XXXXX, 2222-2222-2222-2 ; ; The [LICENSE] section may point to an external file which contains ; license keys for one or more PEEDIs. The external file must include ; the text [LICENSE] followed by all keys. ; ; Example: ; [LICENSE] ; FILE = tftp://192.168.3.1/license.txt ; or ; FILE=eep:license.txt ; or ; FILE = ftp://user:password@192.168.3.1/license.txt ; ; ; PEEDI is shipped with license keys stored in "eep:license.txt" and ; printed on a label on the bottom side of PEEDI. ; [LICENSE] FILE=eep:license.txt ;-------------------------------------------------------------------------- [DEBUGGER] PROTOCOL = gdb_remote ; gdb remote REMOTE_PORT = 2000 ; TCP/IP port [TARGET] PLATFORM = Cortex-M_SWD ;PLATFORM = Cortex-M [PLATFORM_Cortex-M_SWD] SWD_CLOCK = 100, 5000 ; SWD Clock in [kHz] TRST_TYPE = OPENDRAIN ; type of TRST output: OPENDRAIN or PUSHPULL RESET_TIME = 20 ; length of RESET pulse in ms; 0 means no RESET CORE0_RESET_MODE = sysresetreq ; software reset: sysresetreq (default) or vectreset CORE0 = Cortex-M CORE0_STARTUP_MODE = RESET ; stop the core immediately after reset CORE0_ENDIAN = LITTLE ; core is little endian CORE0_BREAKMODE = SOFT ; breakpoint mode CORE0_INIT = INIT_STM32 ; init section for STM32 CORE0_FLASH0 = SOFT_SPI CORE0_FLASH1 = FLASH_STM32 CORE0_WORKSPACE = 0x20000000, 0x4000 ; workspace for agent programming ;CORE0_SWO = 0, 2001 CORE0_PATH = "tftp://192.168.3.60" ; default path [PLATFORM_CortexM3] JTAG_CHAIN = 5, 4 ; list of TAP controllers in the JTAG chain JTAG_CLOCK = 100, 5000 ; JTAG Clock in [kHz] TRST_TYPE = OPENDRAIN ; type of TRST output: OPENDRAIN or PUSHPULL RESET_TIME = 20 ; length of RESET pulse in ms; 0 means no RESET CORE0_RESET_MODE = sysresetreq ; software reset: sysresetreq (default) or vectreset CORE0 = Cortex-M,1 CORE0_STARTUP_MODE = RESET ; stop the core immediately after reset CORE0_ENDIAN = LITTLE ; core is little endian CORE0_BREAKMODE = SOFT ; breakpoint mode CORE0_INIT = INIT_STM32 ; init section for STM32 CORE0_FLASH0 = SOFT_SPI CORE0_FLASH1 = FLASH_STM32 ; FLASH section parameters CORE0_WORKSPACE = 0x20000000, 0x4000 ; workspace for agent programming CORE0_PATH = "tftp://192.168.3.60" ; default path [INIT_STM32] mem or 0x40021000 0x00010000 ; switch On HSE wait 100 ; wait to stabilize mem wr 0x40021004 0x001D0000 ; config PLL div:1 mul:9 = 72MHz mem or 0x40021000 0x01000000 ; switch On PLL wait 100 ; wait to stabilize mem wr 0x40022000 0x00000012 ; 1ws for FLASH mem wr 0x40021004 0x001D0002 ; select PLL set pc 0 ; set PC and SP to avoid gdb complaining set sp 0x20004FFC ; when FLASH is empty ; enable all peripheral clocks mem write 0x40021014 0xFFFFFFFF ; RCC mem write 0x40021018 0xFFFFFFFF ; RCC mem write 0x4002101C 0xFFFFFFFF ; RCC ; set PC12 as output memory and 0x40011004 0xFFF0FFFF memory or 0x40011004 0x00010000 memory and 0x4001100C 0xEFFF ; turn on LED (PC12) memory or 0x4001100C 0x1000 ; turn off LED wait 100 memory and 0x4001100C 0xEFFF ; turn on LED (PC12) memory or 0x4001100C 0x1000 ; turn off LED wait 100 memory and 0x4001100C 0xEFFF ; turn on LED (PC12) memory or 0x4001100C 0x1000 ; turn off LED memory write 0x40010C04 0x14114444 ; set PB12,PB13,PB15 as output memory write 0x40010C10 0x0000B000 ; set PB12, PB13, PB15 [FLASH_STM32] CHIP = STM32 ; flash chip BASE_ADDR = 0x08000000 ; flash is mapped at 0x08000000 ACCESS_METHOD = AGENT ; use agent programming AUTO_ERASE = NO ; erase before program FILE = "test512k.bin" 0x08000000 ; file to program ; Programing speed: ; JTAG or SWD, 5MHz - 35.7 KB/s ; JTAG or SWD, 20MHz - 42.5 KB/s [SOFT_SPI] CHIP = SPI25_FLASH CPU = GENERIC_SPI CS_ASSERT = 0x40010C10 equ 0x10000000 ; clear PB12 CS_RELEASE = 0x40010C10 equ 0x00001000 ; set PB12 MOSI_SET = 0x40010C10 equ 0x00008000 ; set PB15 MOSI_CLR = 0x40010C10 equ 0x80000000 ; clear PB15 SCLK_SET = 0x40010C10 equ 0x00002000 ; set PB13 SCLK_CLR = 0x40010C10 equ 0x20000000 ; clear PB13 MISO_READ = 0x40010C08 and 0x00004000 ; get PB14 SPI_MODE = 3 FILE = "test256k.bin", bin, 0 [SERIAL] ; serial port configuration BAUD = 115200 STOP_BITS = 1 PARITY = NONE TCP_PORT = 0 [TELNET] PROMPT = "stm32> " ; telnet prompt ;BACKSPACE = 127 ; comment out for autodetect [DISPLAY] BRIGHTNESS = 20 ; LED indicator brightness VOLUME = 25 ; beeper volume [ACTIONS] ; user defined scripts ;AUTORUN = 2 ; executed on every target connect 1 = erase 2 = prog 3 = dump_ram 4 = dump_flash [erase] ; erase flash flash erase [prog] ; program flash flash prog