;-------------------------------------------------------------------------- ; ; ; PEEDI sample target configuration file ; ; Ronetix GmbH ; ; Supported devices : STM32 L0 ; ; Revision : 1.0 ; ; Date : April 27, 2020 ; ; The file is delivered "AS IS" without warranty or condition of any ; kind, either express, implied or statutory. This includes without ; limitation any warranty or condition with respect to merchantability or ; fitness for any particular purpose, or against the infringements of ; intellectual property rights of others. ; ;-------------------------------------------------------------------------- ;-------------------------------------------------------------------------- ; The following section contains licenses that are required for PEEDI to ; operate. These licenses must be filled before using this file. ; The [LICENSE] section may contain license keys for one or more PEEDIs. ; ; Example: ; [LICENSE] ; KEY = UPDATE_24MAY2010, 1111-1111-1111-1 ; KEY = XXXXX, 2222-2222-2222-2 ; ; The [LICENSE] section may point to an external file which contains ; license keys for one or more PEEDIs. The external file must include ; the text [LICENSE] followed by all keys. ; ; Example: ; [LICENSE] ; FILE = tftp://192.168.3.1/license.txt ; or ; FILE=eep:license.txt ; or ; FILE = ftp://user:password@192.168.3.1/license.txt ; ; ; PEEDI is shipped with license keys stored in "eep:license.txt" and ; printed on a label on the bottom side of PEEDI. ; [LICENSE] FILE=eep:license.txt ;-------------------------------------------------------------------------- [DEBUGGER] PROTOCOL = gdb_remote ; debug protocol REMOTE_PORT = 2000 ; TCP/IP port ;FLASH = FLASH_STM32 ; flash section to be used when programming via gdb [TARGET] PLATFORM = Cortex-SWD [PLATFORM_Cortex-SWD] SWD_CLOCK = 100, 2000 ; SWD Clock in [kHz] TRST_TYPE = OPENDRAIN ; type of TRST output: OPENDRAIN or PUSHPULL RESET_TIME = 20 ; length of RESET pulse in ms; 0 means no RESET CORE0 = Cortex-M ; TAP is Cortex-M CPU CORE0_STARTUP_MODE = RESET ; stop the core immediately after reset CORE0_ENDIAN = LITTLE ; core is little endian CORE0_BREAKMODE = SOFT ; breakpoint mode CORE0_INIT = INIT_STM32_L0 CORE0_FLASH0 = FLASH_STM32 CORE0_WORKSPACE = 0x20000000, 0x2000 ; workspace for agent programming CORE0_SWO = 0, 2001 CORE0_PATH = "tftp://192.168.3.60" ; default path [INIT_STM32_L0] mem write 0x40021000 0x00000101 ; Set HSION in RCC_CR mem write 0x4002100c 0x00000001 ; Set HSI as SYSCLK [FLASH_STM32] CHIP = STM32 ; flash chip BASE_ADDR = 0x08000000 ; flash is mapped at 0x08000000 ACCESS_METHOD = AGENT ; use agent programming AUTO_ERASE = NO ; erase before program FILE = test32k.bin 0x8000000 ; file to program [FLASH_GDB] ; used when programming via gdb CHIP = STM32 ; flash chip BASE_ADDR = 0x0 ; flash is mapped at 0x00000000 ACCESS_METHOD = AGENT ; use agent programming AUTO_ERASE = NO ; erase before program FILE = test32k.bin 0x0 ; file to program [SERIAL] ; serial port configuration BAUD = 115200 STOP_BITS = 1 PARITY = NONE TCP_PORT = 0 [TELNET] PROMPT = "stm32l0> " ; telnet prompt ;BACKSPACE = 127 ; comment out for autodetect [DISPLAY] BRIGHTNESS = 20 ; LED indicator brightness VOLUME = 25 ; beeper volume [ACTIONS] ; user defined scripts ;AUTORUN = 2 ; executed on every target connect 1 = erase 2 = prog 3 = dump_ram 4 = dump_flash [erase] ; erase flash flash erase [prog] ; program flash flash prog