;------------------------------------------------------------------------------- ; ; mpc5200_ixb.cfg ; --------------- ; ; PEEDI target configuration file for custom MPC5200 board ; ; ; Ronetix GmbH ; ; Supported devices : MPC5200, e300 v1.1, PVR = 0x80822011 ; ; Revision : 1.0 ; ; Date : March 9, 2020 ; ; The file is delivered "AS IS" without warranty or condition of any ; kind, either express, implied or statutory. This includes without ; limitation any warranty or condition with respect to merchantability or ; fitness for any particular purpose, or against the infringements of ; intellectual property rights of others. ; ;------------------------------------------------------------------------------- ;-------------------------------------------------------------------------- ; The following section contains licenses that are required for PEEDI to ; operate. These licenses must be filled before using this file. ; The [LICENSE] section may contain license keys for one or more PEEDIs. ; ; Example: ; [LICENSE] ; KEY = UPDATE_24MAY2010, 1111-1111-1111-1 ; KEY = XXXXX, 2222-2222-2222-2 ; ; The [LICENSE] section may point to an external file which contains ; license keys for one or more PEEDIs. The external file must include ; the text [LICENSE] followed by all keys. ; ; Example: ; [LICENSE] ; FILE = tftp://192.168.3.1/license.txt ; or ; FILE=eep:license.txt ; or ; FILE = ftp://user:password@192.168.3.1/license.txt ; ; ; PEEDI is shipped with license keys stored in "eep:license.txt" and ; printed on a label on the bottom side of PEEDI. ; [LICENSE] FILE=eep:license.txt ;-------------------------------------------------------------------------- [DEBUGGER] PROTOCOL = gdb_remote ; gdb remote REMOTE_PORT = 2000 ; TCP/IP port [TARGET] PLATFORM = MPC5200 ; platform is MPC5200 [PLATFORM_MPC5200] JTAG_CHAIN = 8 ; list of IR lenght of all TAP controller in JTAG chain JTAG_CLOCK = 25000 ; JTAG Clock in [kHz] TRST_TYPE = PUSHPULL ; type of TRST output: OPENDRAIN or PUSHPULL RESET_TIME = 20 ; lenght of RESET pulse in ms; 0 means no RESET WAKEUP_TIME = 1000 ; FPGA statup time TIME_AFTER_RESET = 20 CORE0 = MPC5200 ; TAP is MPC5200 CPU CORE0_STARTUP_MODE = RESET CORE0_BREAKMODE = SOFT ; breakpoint mode: ; soft - software breakpoint ; hard - use hardware breakpoints instead of software CORE0_INIT = INIT_MPC5200 ; init section CORE0_FLASH0 = FLASH_CFI CORE0_FLASH1 = FLASH_DIRECT ; flash section parameters CORE0_ENDIAN = BIG ; core is little endian CORE0_BOOT_ADDR = 0x100 CORE0_WORKSPACE = 0x00000000, 0x4000 ; start address of workspace for flash programmer CORE0_PATH = "tftp://192.168.3.60" CORE0_FILE = "myfile.bin", 0 [INIT_MPC5200] ; init core register set msr 0x00001002 ; MSR : ME,RI mem write 0x80000000 0x0000f000 ;MBAR : internal registers at 0xf0000000 set spr 311 0xf0000000 ; MBAR : save internal register offset ; ; init memory controller mem write 0xf0000004 0x0000ff00 ; CS0 start = 0xff000000 mem write 0xf0000008 0x0000ffff ; CS0 stop = 0xffffffff mem write 0xf0000300 0x00043800 ; BOOT ctrl mem write 0xf0000054 0x00010001 ; CSE: enable CS0, disable CSBOOT mem write 0xF0000318 0x01000000 ; CS Master enable ; Set gpio_wkup_6 pin as chip select 1 for DDR controller ;-------------------------------------------------------- mem write 0xF0000B00 0x80000000 mem write 0xF0000034 0x00000019 ; SDRAM CS0, 128 MByte physical, logical start @ 0x00000000 mem write 0xF0000038 0x04000000 ; SDRAM CS1, 128 MByte physical, logical start @ 0x08000000 mem write 0xf0000108 0xd2333a00 ; SDRAM Config 1 mem write 0xf000010c 0x88b70004 ; SDRAM Config 2 mem write 0xf0000104 0xd15f0000 ; SDRAM Control mem write 0xf0000104 0xd15f0002 ; SDRAM Control: precharge all mem write 0xf0000100 0x04cd0000 ; SDRAM Mode mem write 0xf0000104 0xd15f0002 ; SDRAM Control: precharge all mem write 0xf0000104 0xd15f0004 ; SDRAM Control: refresh mem write 0xf0000100 0x00cd0000 ; SDRAM Mode mem write 0xf0000104 0x515f0000 ; SDRAM Control [FLASH_CFI] CHIP = CFI_FLASH ACCESS_METHOD = AGENT ; program method auto CHECK_ID = YES ; check chip ID CHIP_WIDTH = 8 ; chip is in 8-bit configuration CHIP_COUNT = 1 ; one chip is used BASE_ADDR = 0xFF000000 FILE = "test32k.bin", bin, 0 AUTO_ERASE = NO AUTO_LOCK = NO [FLASH_DIRECT] CHIP = CFI_FLASH ACCESS_METHOD = DIRECT CHECK_ID = YES ; check chip ID CHIP_WIDTH = 8 ; chip is in 8-bit configuration CHIP_COUNT = 1 ; one chip is used BASE_ADDR = 0xFF000000 FILE = "test32k.bin", bin, 0 AUTO_ERASE = NO AUTO_LOCK = NO [SERIAL] ; serial port configuration BAUD = 115200 STOP_BITS = 1 PARITY = NONE TCP_PORT = 0 [TELNET] PROMPT = "mpc5200> " ; telnet prompt ;BACKSPACE = 127 ; comment out for autodetect [DISPLAY] BRIGHTNESS = 20 ; LED indicator brightness VOLUME = 25 ; zummer volume [ACTIONS] ; user defined scripts 1 = erase 2 = prog [erase] ; erase flash flash erase [prog] ; program flash flash program