;------------------------------------------------------------------------------- ; ; mpc5510.cfg ; ----------- ; ; PEEDI target configuration file for Freescale MPC5510 CPU ; ; ; Ronetix GmbH ; ; Supported devices : MPC5510 ; Board : 5510_LITE ; ; Revision : 1.0 ; ; Date : November 04, 2008 ; ; The file is delivered "AS IS" without warranty or condition of any ; kind, either express, implied or statutory. This includes without ; limitation any warranty or condition with respect to merchantability or ; fitness for any particular purpose, or against the infringements of ; intellectual property rights of others. ; ;------------------------------------------------------------------------------- ;-------------------------------------------------------------------------- ; The following section contains licenses that are required for PEEDI to ; operate. These licenses must be filled before using this file. ; The [LICENSE] section may contain license keys for one or more PEEDIs. ; ; Example: ; [LICENSE] ; KEY = UPDATE_24MAY2010, 1111-1111-1111-1 ; KEY = XXXXX, 2222-2222-2222-2 ; ; The [LICENSE] section may point to an external file which contains ; license keys for one or more PEEDIs. The external file must include ; the text [LICENSE] followed by all keys. ; ; Example: ; [LICENSE] ; FILE = tftp://192.168.3.1/license.txt ; or ; FILE=eep:license.txt ; or ; FILE = ftp://user:password@192.168.3.1/license.txt ; ; ; PEEDI is shipped with license keys stored in "eep:license.txt" and ; printed on a label on the bottom side of PEEDI. ; [LICENSE] FILE=eep:license.txt ;-------------------------------------------------------------------------- [DEBUGGER] PROTOCOL = gdb_remote ; gdb remote REMOTE_PORT = 2000 ; TCP/IP port [TARGET] PLATFORM = MPC5500 [PLATFORM_MPC5500] MPC5XXX_AUX_TAP_CMD = 5, 0x1C ; enable e200z0 core JTAG_CHAIN = 10, 10 ; list of IR lenght of all TAP controller in JTAG chain JTAG_CLOCK = 10000 ; JTAG Clock in [kHz] TRST_TYPE = PUSHPULL ; type of TRST (JCOMP) output: OPENDRAIN or PUSHPULL RESET_TIME = 20 ; lenght of RESET pulse in ms; 0 means no RESET TIME_AFTER_RESET = 50 CORE0 = MPC5XXX CORE0_STARTUP_MODE = RESET CORE0_BREAKMODE = soft ; breakpoint mode: ; soft - software breakpiont ; hard - use hardware breakpoints instead of software CORE0_INIT = INIT_MPC5510 ; init section CORE0_FLASH0 = FLASH_MPC5510 ; flash section parameters CORE0_ENDIAN = BIG ; core is big endian CORE0_WORKSPACE_ADDR = 0x40000000 ; start address of workspace for flash programmer CORE0_WORKSPACE_LEN = 0x8000 ; length of workspace in bytes CORE0_USE_NEXUS3_ACCESS = NO ; use faster mem access for a given region ; Default path to be used if only a file name (without the full path) is ; provided to a PEEDI command or for the FILE parameter in the Flash sections ; Examples: ; In a console: ; "flash prog tftp://192.168.3.1/image.elf" ; is equal to ; "flash prog image.elf" ; ; In a Flash Profile: ; FILE="tftp://192.168.3.1/image.bin", BIN, 0 ; is equal to ; FILE="image.bin", BIN, 0 ; CORE0_PATH = "tftp://192.168.3.60" ;CORE0_PATH = "card://" CORE0_FILE = "myfile.bin", 0x40000000 [INIT_MPC5510] ; Init MMU so virtual addresses eqial to phisical ; this way we can use Nexus3 module for memory operations ; ; Setup MMU for for Periph B Modules ; Base address = 0xFFF0_0000 ; TLB0, 1 MByte Memory Space, Guarded, Don't Cache, All Access, VLE ; Periph B is set to VLE because of BAM (Boot Assist Module) set MAS0 0x10000000 set MAS1 0xC0000500 set MAS2 0xFFF0002A set MAS3 0xFFF0003F exec 0x7C0007A4 ; tlbwe mem write16 0xFFF40016 0 ; disable watchdog as soon as possible ; Set up MMU to put internal Flash at 0... ; Virtual address 0x0 -> Physical address = 0x0000_0000 ; TLB1, 256 MByte Memory Space, Not Guarded, Don't Cache, All Access, PPC set MAS0 0x10010000 set MAS1 0xC0000900 set MAS2 0x00000008 set MAS3 0x0000003F exec 0x7C0007A4 ; tlbwe ; Set up MMU for External Memory ; Base address = 0x2000_0000 ; TLB2, 256 MByte Memory Space, Not Guarded, Cachable, All Access, PPC set MAS0 0x10020000 set MAS1 0xC0000900 set MAS2 0x20000000 set MAS3 0x2000003F exec 0x7C0007A4 ; tlbwe ; Set up MMU for Internal SRAM ; Base address = 0x4000_0000 ; TLB3, 256 KByte Memory Space, Not Guarded, Don't Cache, All Access, PPC set MAS0 0x10030000 set MAS1 0xC0000400 set MAS2 0x40000008 ; VLE bit (bit5) is 0 -> BookE ;set MAS2 0x40000028 ; VLE bit (bit5) is 1 -> VLE set MAS3 0x4000003F exec 0x7C0007A4 ; tlbwe set IVPR 0xFFFFF000 ; IVPR points to valid memory space echo Please wait, initializing SRAM... mem write 0x40000000 0 0x4000 ; 64KB in MPC5516 devices ;mem write 0x40000000 0 0x5000 ; 80KB in MPC5517 devices [FLASH_MPC5510] CHIP = MPC5XXX ; internal FLASH FILE = "test1m.bin", BIN, 0 ; The Freescale H7F VLE software driver has a bug and doesn't program ; the flash. There is no error, but the flash is not programmed. ; Because of this BOOKE mode is used ; If changing to VLE mode, donn't forget to modify MAS2 when setup SRAM AGENT_MODE = BOOKE [SERIAL] ; serial port configuration BAUD = 115200 STOP_BITS = 1 PARITY = NONE TCP_PORT = 0 ; enable CLI over RS232 ;TCP_PORT = 2023 ; enable serial over TCP/IP [TELNET] PROMPT = "mpc5510> " ; telnet prompt ;BACKSPACE = 127 ; comment out for autodetect [DISPLAY] BRIGHTNESS = 20 ; LED indicator brightness VOLUME = 25 ; zummer volume [ACTIONS] ; user defined scripts 1 = erase 2 = prog 3 = dump_ram 4 = dump_flash [erase] ; erase flash flash erase [prog] ; program flash flash prog [dump_ram] ; dump part ot RAM memory dump 0x40000000 0x01000 tftp:ram.bin [dump_flash] ; dump part of FLASH memory dump 0x00000000 0x10000 tftp:flash.bin