;------------------------------------------------------------------------------- ; ; mpc5554.cfg ; ----------- ; ; PEEDI target configuration file for MPC5554DEMO evaluation board ; ; ; Ronetix GmbH ; ; Supported devices : MPC5554DEMO eval board ; EVB-5554 (iSystem board) ; ; Revision : 1.3 ; ; Date : Sep 24, 2013 ; ; The file is delivered "AS IS" without warranty or condition of any ; kind, either express, implied or statutory. This includes without ; limitation any warranty or condition with respect to merchantability or ; fitness for any particular purpose, or against the infringements of ; intellectual property rights of others. ; ;------------------------------------------------------------------------------- ;-------------------------------------------------------------------------- ; The following section contains licenses that are required for PEEDI to ; operate. These licenses must be filled before using this file. ; The [LICENSE] section may contain license keys for one or more PEEDIs. ; ; Example: ; [LICENSE] ; KEY = UPDATE_24MAY2010, 1111-1111-1111-1 ; KEY = XXXXX, 2222-2222-2222-2 ; ; The [LICENSE] section may point to an external file which contains ; license keys for one or more PEEDIs. The external file must include ; the text [LICENSE] followed by all keys. ; ; Example: ; [LICENSE] ; FILE = tftp://192.168.3.1/license.txt ; or ; FILE=eep:license.txt ; or ; FILE = ftp://user:password@192.168.3.1/license.txt ; ; ; PEEDI is shipped with license keys stored in "eep:license.txt" and ; printed on a label on the bottom side of PEEDI. ; [LICENSE] FILE=eep:license.txt ;-------------------------------------------------------------------------- [DEBUGGER] PROTOCOL = gdb_remote ; gdb remote REMOTE_PORT = 2000 ; TCP/IP port [TARGET] PLATFORM = MPC5500 ; platform is MPC5XXX [PLATFORM_MPC5500] JTAG_CHAIN = 10 ; list of IR lenght of all TAP controller in JTAG chain JTAG_CLOCK = 1000, 16000 ; JTAG Clock in [kHz] - 10kHz jtag clock for init operations and 16MHz for normal work TRST_TYPE = PUSHPULL ; type of TRST (JCOMP) output: OPENDRAIN or PUSHPULL RESET_TIME = 100 ; lenght of RESET pulse in ms; 0 means no RESET CORE0 = MPC5XXX_SPE CORE0_STARTUP_MODE = RESET CORE0_BREAKMODE = soft ; breakpoint mode: ; soft - software breakpiont ; hard - use hardware breakpoints instead of software CORE0_INIT = INIT_MPC5554 ; init section for MPC5554DEMO board ; CORE0_INIT = INIT_EVB5554 ; init section for EVB-5554 board CORE0_FLASH0 = FLASH_MPC ; flash section parameters CORE0_ENDIAN = BIG ; core is big endian CORE0_WORKSPACE_ADDR = 0x40000000 ; start address of workspace for flash programmer CORE0_WORKSPACE_LEN = 0x8000 ; length of workspace in bytes CORE0_USE_NEXUS3_ACCESS = NO ; use faster mem access for a given region ;CORE0_USE_NEXUS3_ACCESS = 0x40000000, 0x10000 ; Default path to be used if only a file name (without the full path) is ; provided to a PEEDI command or for the FILE parameter in the Flash sections ; Examples: ; In a console: ; "flash prog tftp://192.168.3.1/image.elf" ; is equal to ; "flash prog image.elf" ; ; In a Flash Profile: ; FILE="tftp://192.168.3.1/image.bin", BIN, 0 ; is equal to ; FILE="image.bin", BIN, 0 ; CORE0_PATH = "tftp://192.168.3.60" ;CORE0_PATH = "card://" CORE0_FILE = "myfile.bin", 0x40000000 ; Init section for Freescale MPC5554DEMO board [INIT_MPC5554] ; Init MMU so virtual addresses equal to physical ; this way we can use Nexus3 module for memory operations ; Setup MMU for for Periph B Modules ; Base address = 0xFFF0_0000 ; TLB0, 1 MByte Memory Space, Guarded, Don't Cache, All Access, BookE ; Periph B is set to BookE because of BAM (Boot Assist Module) set MAS0 0x10000000 set MAS1 0xC0000500 set MAS2 0xFFF0000A set MAS3 0xFFF0003F exec 0x7C0007A4 ; tlbwe ; Set up MMU for Internal SRAM ; Base address = 0x4000_0000 ; TLB3, 256 KByte Memory Space, Not Guarded, Don't Cache, All Access, PPC set MAS0 0x10010000 set MAS1 0xC0000400 set MAS2 0x40000008 ; VLE bit (bit5) is 0 -> BookE ;set MAS2 0x40000028 ; VLE bit (bit5) is 1 -> VLE set MAS3 0x4000003F exec 0x7C0007A4 ; tlbwe ; Set up MMU for Periph A Modules ; Base address = $C3F0_0000 ; TLB4, 1 MByte Memory Space, Not Guarded, Don't Cache, All Access echo Set up MMU for Periph A Modules set MAS0 0x10020000 set MAS1 0xC0000500 set MAS2 0xC3F00008 set MAS3 0xC3F0003F exec 0x7C0007A4 ; tlbwe ; Set up MMU to put internal Flash at 0x0 ; Virtual address 0x0 -> Physical address = 0x0000_0000 ; TLB1, 256 MByte Memory Space, Not Guarded, Don't Cache, All Access, PPC set MAS0 0x10040000 set MAS1 0xC0000700 set MAS2 0x00000000 set MAS3 0x0000003F exec 0x7C0007A4 ; tlbwe ; external SRAM on CS0 mem write 0xC3F84010 0x20000003 ; disable FLASH prefetching anf pipelining ; and set read and write waitstates ;mem wr 0xC3F8801C 0x0000EB00 ; set PLL to 32MHz mem wr 0xC3F80000 0x06140000 wait 200 ; set PLL to 128Mhz mem wr 0xC3F80000 0x06040000 wait 200 ; set clock to normal to speedup RAM init clock normal ; remove this when INIT used for multicore ; init internal RAM mem wr64 0x40000000 0x9421fff09421fff0 0x2000 ; Init section for iSystem EVB-5554 board, MPC5554MZP132 [INIT_EVB5554] ; init MMU so virtual addresses eqial to phisical ; this way we can use Nexus3 module for memory operations set MAS0 0x10000000 set MAS1 0xC0000500 set MAS2 0xFFF0000A set MAS3 0xFFF0003F exec 0x7C0007A4 ; tlbwe set MAS0 0x10030000 set MAS1 0xC0000400 set MAS2 0x40000008 set MAS3 0x4000003F exec 0x7C0007A4 ; tlbwe set MAS0 0x10040000 set MAS1 0xC0000500 set MAS2 0xC3F00008 set MAS3 0xC3F0003F exec 0x7C0007A4 ; tlbwe set MAS0 0x10010000 set MAS1 0xC0000700 set MAS2 0x00000000 set MAS3 0x0000003F exec 0x7C0007A4 ; tlbwe set MAS0 0x10020000 set MAS1 0xC0000700 set MAS2 0x20000000 set MAS3 0x2000003F exec 0x7C0007A4 ; tlbwe ; external SRAM on CS0 mem write 0xC3F84010 0x20000003 ; disable FLASH prefetching anf pipelining ; and set read and write waitstates ;mem wr 0xC3F8801C 0x0000EB00 ; set PLL to 32MHz mem wr 0xC3F80000 0x06140000 wait 200 ; set PLL to 128Mhz mem wr 0xC3F80000 0x06040000 wait 200 ; set clock to normal to speedup RAM init clock normal ; remove this when INIT used for multicore ; init internal RAM mem wr64 0x40000000 0x9421fff09421fff0 0x2000 [FLASH_MPC] CHIP = MPC5xxx ; internal FLASH ; MPC5554 supports only BookE AGENT_MODE = BOOKE ; BOOKE or VLE depending on CPU/RAM FILE = "test2m.bin", BIN, 0 [SERIAL] ; serial port configuration BAUD = 115200 STOP_BITS = 1 PARITY = NONE TCP_PORT = 0 ; enable CLI over RS232 ;TCP_PORT = 2023 ; enable serial over TCP/IP [TELNET] PROMPT = "mpc5554> " ; telnet prompt ;BACKSPACE = 127 ; comment out for autodetect [DISPLAY] BRIGHTNESS = 20 ; LED indicator brightness VOLUME = 25 ; zummer volume [ACTIONS] ; user defined scripts 1 = erase 2 = prog 3 = dump_ram 4 = dump_flash [erase] ; erase flash flash erase [prog] ; program flash flash prog [dump_ram] ; dump part ot RAM memory dump 0x40000000 0x01000 tftp:ram.bin [dump_flash] ; dump part of FLASH memory dump 0x00000000 0x10000 tftp:flash.bin