;------------------------------------------------------------------------------- ; ; mpc8272.cfg ; ----------- ; ; PEEDI target configuration file for MPC8272 ; ; ; Ronetix ; ; Supported devices : MPC8272 ; Board : Cicso 878 ; ; Revision : 1.0 ; ; Date : February 16, 2016 ; ; The file is delivered "AS IS" without warranty or condition of any ; kind, either express, implied or statutory. This includes without ; limitation any warranty or condition with respect to merchantability or ; fitness for any particular purpose, or against the infringements of ; intellectual property rights of others. ; ;----------------------------------------------------------------------- ;----------------------------------------------------------------------- ; The following section contains licenses that are required for PEEDI to ; operate. These licenses must be filled before using this file. ; The [LICENSE] section may contain license keys for one or more PEEDIs. ; ; Example: ; [LICENSE] ; KEY = UPDATE_24MAY2010, 1111-1111-1111-1 ; KEY = XXXXX, 2222-2222-2222-2 ; ; The [LICENSE] section may point to an external file which contains ; license keys for one or more PEEDIs. The external file must include ; the text [LICENSE] followed by all keys. ; ; Example: ; [LICENSE] ; FILE = tftp://192.168.3.1/license.txt ; or ; FILE=eep:license.txt ; or ; FILE = ftp://user:password@192.168.3.1/license.txt ; ; ; PEEDI is shipped with license keys stored in "eep:license.txt" and ; printed on a label on the bottom side of PEEDI. ; [LICENSE] FILE=eep:license.txt ;----------------------------------------------------------------------- [DEBUGGER] PROTOCOL = gdb_remote ; gdb remote REMOTE_PORT = 2000 ; TCP/IP port [TARGET] PLATFORM = MPC5200 ; platform is MPC5200 [PLATFORM_MPC5200] JTAG_CHAIN = 8 ; list of IR lenght of all TAP controller in JTAG chain JTAG_CLOCK = 8000 ; JTAG Clock in [kHz] - 8MHz for normal work TRST_TYPE = PUSHPULL ; type of TRST output: OPENDRAIN or PUSHPULL RESET_TIME = 20 ; lenght of RESET pulse in ms; 0 means no RESET TIME_AFTER_RESET = 500 CORE0 = MPC8200 CORE0_STARTUP_MODE = RESET CORE0_BREAKMODE = SOFT ; breakpoint mode: ; soft - software breakpiont ; hard - use hardware breakpoints instead of software CORE0_INIT = INIT_MPC8200 CORE0_FLASH0 = FLASH_NOR ; flash section parameters CORE0_ENDIAN = BIG ; core is little endian ;CORE0_BOOT_ADDR = 0x100 CORE0_BOOT_ADDR = 0xFFF00100 CORE0_WORKSPACE = 0x04700000, 0x2000 ; start address of workspace for flash programmer CORE0_PATH = "tftp://192.168.3.60" CORE0_FILE = "myfile.bin" [INIT_MPC8200] ; init core register set MSR 0x00001002 ;MSR : ME,RI mem write 0x0F010004 0xFFFFFFC3 ;SYPCR: disable watchdog mem write 0x0F0101A8 0x04700000 ;IMMR : internal space @ 0x04700000 mem write 0x04710024 0x100C0000 ;BCR : Single PQ2, .. mem write 0x04710c94 0x00000001 ;RMR : checkstop reset enable ; init memory controller mem write 0x04710104 0xFF800876 ;OR0: Flash 8MB, CS early negate, 11 w.s., Timing relax ;mem write 0x04710100 0xFF801801 ;BR0: Flash @0xFF800000, 32bit, no parity mem write 0x04710100 0xFF801001 ;BR0: Flash @0xFF800000, 16bit, no parity mem write 0x0471010C 0xFFFF8010 ;OR1: BCSR 32KB, all types access, 1 w.s. mem write 0x04710108 0x04501801 ;BR1: BCSR @0x04500000, 32bit, no parity mem write 0x04710124 0xFFFF8866 ;OR4: EEPROM 32KB, all types access, 6 w.s. mem write 0x04710120 0xC2000801 ;BR4: EEPROM @0xC2000000, 8bit, no parity ; Intel 28F320J3 - doesn't work [FLASH_NOR] CHIP = CFI_FLASH CHIP_WIDTH = 16 CHIP_COUNT = 1 ACCESS_METHOD = AGENT ; program method auto BASE_ADDR = 0xFF900000 FILE = "test32k.bin", bin, 0 [SERIAL] ; serial port configuration BAUD = 115200 STOP_BITS = 1 PARITY = NONE TCP_PORT = 0 [TELNET] PROMPT = "mpc8272> " ; telnet prompt ;BACKSPACE = 127 ; comment out for autodetect [DISPLAY] BRIGHTNESS = 20 ; LED indicator brightness VOLUME = 25 ; zummer volume [ACTIONS] ; user defined scripts 1 = erase 2 = prog [erase] ; erase flash flash erase [prog] ; program flash flash program