;--------------------------------------------------------------------------
;
;
;   PEEDI target configuration file for PowerPC PPC440GP processor
;
;   Ronetix
;   
;   Supported devices   : PPC440GP
;
;   Board               : IBM PPC440GP, 38P1833-R4B	
;
;   Revision            : 1.0
;
;   Date                : March 30, 2020
;
;--------------------------------------------------------------------------

;--------------------------------------------------------------------------
; The following section contains licenses that are required for PEEDI 
; to operate.
;
; These licenses must be filled before using this file.
;
;   Example:
;       [LICENSE]
;       KEY         = UPDATE_24MAY2007, 1111-1111-1111-1
;       KEY         = ARM7,             2222-2222-2222-2
;
; The minimum required licenses are provided when PEEDI is purchased 
; and are printed on the bottom side of PEEDI.
;

[LICENSE]
; The license keys for one or more PEEDIs can be loaded from an external file
FILE = eep:license.txt

;-------------------------------------------------------------------------------

[DEBUGGER]
PROTOCOL                = gdb_remote
REMOTE_PORT             = 2000              ; TCP/IP port

[TARGET]
PLATFORM                = PPC400            

[PLATFORM_PPC400]
JTAG_CHAIN              = 7           ; list of IR lenght of all TAP controller in JTAG chain
JTAG_CLOCK              = 4000, 16000 ; JTAG Clock in [kHz]
TRST_TYPE               = PUSHPULL    ; type of TRST output: OPENDRAIN or PUSHPULL
RESET_TIME              = 10          ; lenght of RESET pulse in ms; 0 means no RESET
WAKEUP_TIME             = 1000
TIME_AFTER_RESET		= 200
CORE0                   = PPC440
CORE0_INIT              = INIT_PPC440
CORE0_STARTUP_MODE      = reset
CORE0_BREAKMODE         = hard
CORE0_ENDIAN            = big 
CORE0_FLASH0            = FLASH_NOR
CORE0_WORKSPACE		    = 0xFFF00000, 0x10000 ; SRAM 

; Default path to be used if only a file name (without the full path) is
; provided to a PEEDI command or for the FILE parameter in the Flash sections
; Examples:
;   In a console:
;      "flash prog tftp://192.168.3.1/image.elf" 
;            is equal to
;      "flash prog image.elf"
;
;   In a Flash Profile:
;      FILE="tftp://192.168.3.1/image.bin", BIN, 0
;            is equal to
;      FILE="image.bin", BIN, 0
;
CORE0_PATH  = "tftp://192.168.3.60" 
;CORE0_PATH  = "card://" 

CORE0_FILE              = "u-boot.bin", BIN, 0x0010000 ; default file

[INIT_PPC440]
; Setup TLB
mem management tlbc 0 63	; clear all TLB entries
mem management tlbw 0 0xF0000290 0xF0000001 0x0000053F ; Boot Space 256MB
mem management tlbw 1 0x00000290 0x00000000 0x0000083F ; SDRAM 256MB @ 0x00000000

; Setup Peripheral Bus
set dcr	0x12	0x00000010	;Select EBC0_B0AP
set dcr	0x13	0x9B015480	;B0AP: Flash and SRAM
set dcr	0x12	0x00000000	;Select EBC0_B0CR
set dcr	0x13	0xFFF18000	;B0CR: 1MB at 0xFFF00000, r/w, 8bit
set dcr	0x12	0x00000012	;Select EBC0_B2AP
set dcr	0x13	0x9B015480	;B2AP: 4 MB Flash
set dcr	0x12	0x00000002	;Select EBC0_B2CR
set dcr	0x13	0xff858000	;B2CR: 4MB at 0xFF800000, r/w, 8bit

; Setup SDRAM Controller (DDR SDRAM)
; single-sided,non-buffered, 12x10(4), 128MB DIMM
set dcr	0x10	0x00000082	;Select SDRAM0_CLKTR
set dcr	0x11	0x40000000	;CLKTR: Advance 90 degrees
set dcr	0x10	0x00000080	;Select SDRAM0_TR0
set dcr	0x11	0x410A4012	;TR0: V2.0
;set dcr	0x11	0x41054009	;TR0: V1.0
set dcr	0x10	0x00000081	;Select SDRAM0_TR1
set dcr	0x11	0x8080082B	;TR1: V2.0
;set dcr	0x11	0x40400800	;TR1: V1.0
set dcr	0x10	0x00000040	;Select SDRAM0_B0CR
set dcr	0x11	0x000A4001	;B0CR:
set dcr	0x10	0x00000030	;Select SDRAM0_RTR
set dcr	0x11	0x08200000	;RTR: V2.0
;set dcr	0x11	0x06180000	;RTR: V1.0
set dcr	0x10	0x00000020	;Select SDRAM0_CFG0
set dcr	0x11	0x06000000	;CFG0: 64bit, PMU disable
set dcr	0x11	0x86000000	;CFG0: enable SDRAM


[FLASH_NOR]
CHIP                = AM29F040          ; flash chip
ACCESS_METHOD       = AGENT             ; program method auto
CHECK_ID            = YES               ; check chip ID
CHIP_WIDTH          = 8                 ; chip is in 16 bit configuration
CHIP_COUNT          = 1                 ; one chip is used
BASE_ADDR           = 0xFFF80000        ; chip is mapped at 0xFFF80000
FILE                = "test32k.bin", BIN, 0xFFF80000 ; file to program
AUTO_ERASE          = NO                ; erase before program
AUTO_LOCK           = NO                ; lock after program

[SERIAL]                                ; serial port configuration
BAUD                = 115200
STOP_BITS           = 1
PARITY              = NONE
TCP_PORT            = 0

[TELNET]
PROMPT              = "ppc440> "        ; telnet prompt
;BACKSPACE          = 127               ; comment out for autodetect

[DISPLAY]
BRIGHTNESS          = 20                ; LED indicator brightness
VOLUME              = 100               ; zummer volume

[ACTIONS]                               ; user defined scripts
1 = erase
2 = prog

[erase]                                 ; erase flash
flash erase

[prog]                                  ; program flash
flash program