;-------------------------------------------------------------------------- ; ; ; PEEDI target configuration file for IXP425 processor ; ; Ronetix ; ; Supported devices : IXP425 ; ; Board : Custom board ; ; Revision : 1.0 ; ; Date : Nov 24, 2006 ; ; The file is delivered "AS IS" without warranty or condition of any ; kind, either express, implied or statutory. This includes without ; limitation any warranty or condition with respect to merchantability or ; fitness for any particular purpose, or against the infringements of ; intellectual property rights of others. ; ;-------------------------------------------------------------------------- ;-------------------------------------------------------------------------- ; The following section contains licenses that are required for PEEDI to ; operate. These licenses must be filled before using this file. ; The [LICENSE] section may contain license keys for one or more PEEDIs. ; ; Example: ; [LICENSE] ; KEY = UPDATE_24MAY2010, 1111-1111-1111-1 ; KEY = XXXXX, 2222-2222-2222-2 ; ; The [LICENSE] section may point to an external file which contains ; license keys for one or more PEEDIs. The external file must include ; the text [LICENSE] followed by all keys. ; ; Example: ; [LICENSE] ; FILE = tftp://192.168.3.1/license.txt ; or ; FILE=eep:license.txt ; or ; FILE = ftp://user:password@192.168.3.1/license.txt ; ; ; PEEDI is shipped with license keys stored in "eep:license.txt" and ; printed on a label on the bottom side of PEEDI. ; [LICENSE] FILE=eep:license.txt ;-------------------------------------------------------------------------- [DEBUGGER] PROTOCOL = gdb_remote ; gdb remote REMOTE_PORT = 2000 ; TCP/IP port [TARGET] PLATFORM = XScale ; platform is XScale [PLATFORM_XSCALE] JTAG_CHAIN = 7 ; IXP425/IXP465 has 7-bit IR JTAG_CLOCK = 1000, 10000 ; JTAG Clock in [kHz] 1MHz JTAG clock for init ; operations and 10MHz for normal work (5kHz - 33MHz) TRST_TYPE = PUSHPULL ; type of TRST output: OPENDRAIN or PUSHPULL RESET_TIME = 20 ; length of RESET pulse in ms; 0 means no RESET TIME_AFTER_RESET = 500 CORE0 = XScale ; TAP is XSCALE CPU CORE0_STARTUP_MODE = RESET ; Stop core CORE0_BREAKMODE = soft ; breakpoint mode: CORE0_INIT = INIT CORE0_FLASH0 = FLASH_28F640J3 ; flash section parameters CORE0_ENDIAN = big CORE0_WORKSPACE_ADDR = 0x10000 ; start address of workspace for flash programmer CORE0_WORKSPACE_LEN = 0x10000 ; length of workspace in bytes CORE0_PATH = "tftp://192.168.3.1" ; default path CORE0_FILE = "test.bin", BIN, 0x50000000 CORE0_DEBUG_HANDLER_ADDR= 0xFFFF0800 ; debug handler base address CORE0_VECTOR_CATCH_MASK = 0x00 ; catch data abort exceptions CORE0_VECTOR_UNDEF = AUTO CORE0_VECTOR_SWI = AUTO CORE0_VECTOR_PABORT = AUTO CORE0_VECTOR_DABORT = AUTO CORE0_VECTOR_RES = AUTO CORE0_VECTOR_IRQ = AUTO CORE0_VECTOR_FIQ = AUTO CORE0_RELOCATED_UNDEF = AUTO CORE0_RELOCATED_SWI = AUTO CORE0_RELOCATED_PABORT = AUTO CORE0_RELOCATED_DABORT = AUTO CORE0_RELOCATED_RES = AUTO CORE0_RELOCATED_IRQ = AUTO CORE0_RELOCATED_FIQ = AUTO [INIT] set control 0xF8 ; switch to big endian mem write 0xCC000000 0x0000000d ; CONF : 256MB, CAS 3 clocks mem write 0xCC000004 0x00000000 ; REFR : disable refresh mem write 0xCC000008 0x00000003 ; IR : NOP wait 20 mem write 0xCC000004 0x0000081a ; REFR : set value mem write 0xCC000008 0x00000002 ; IR : Precharge All wait 20 mem write 0xCC000008 0x00000004 ; IR Auto Refresh #1 mem write 0xCC000008 0x00000004 ; IR Auto Refresh #2 mem write 0xCC000008 0x00000004 ; IR Auto Refresh #3 mem write 0xCC000008 0x00000004 ; IR Auto Refresh #4 mem write 0xCC000008 0x00000004 ; IR Auto Refresh #5 mem write 0xCC000008 0x00000004 ; IR Auto Refresh #6 mem write 0xCC000008 0x00000004 ; IR Auto Refresh #7 mem write 0xCC000008 0x00000004 ; IR Auto Refresh #8 mem write 0xCC000008 0x00000001 ; IR Mode Select CAS3 mem write 0xCC000008 0x00000006 ; IR Normal Operation ; ; Expansion BUS (Flash Memory) ; ;mem write 0xc4000000 0xbcd23c40 ; CS0 Write disabled 0x50000000 mem write 0xc4000000 0xbcd23c42 ; CS0 Write enabled 0x50000000 mem write 0xc4000004 0xbfff3c03 ; CS1 0x51000000 mem write 0xc4000008 0xbfff0002 ; CS2 0x52000000 mem write 0xc4000020 0x00fffffe ; CFG0 Map SDRAM to 0x00000000 [FLASH_28F640J3] CHIP = 28F640J3 ; flash chip ACCESS_METHOD = AGENT ; program method auto CHECK_ID = YES ; check chip ID CHIP_WIDTH = 16 ; chip is in 16 bit configuration CHIP_COUNT = 1 ; two chip are used BASE_ADDR = 0x50000000 ; chip is mapped at 0x0000000 FILE = "test32k.bin", BIN, 0x50000000 [SERIAL] ; serial port configuration BAUD = 115200 STOP_BITS = 1 PARITY = NONE TCP_PORT = 0 ; enable CLI over RS232 ;TCP_PORT = 2023 ; enable serial over TCP/IP [TELNET] PROMPT = "IXP425> " ; telnet prompt ;BACKSPACE = 127 ; comment out for autodetect [DISPLAY] BRIGHTNESS = 20 ; LED indicator brightness VOLUME = 25 ; beeper volume [ACTIONS] ; user defined scripts ;AUTORUN = 2 ; executed on every target connect 1 = erase 2 = prog [erase] ; erase flash flash erase [prog] ; program flash flash program