;--------------------------------------------------------------------------
;
;
;   PEEDI target configuration file for PXA255 processor
;
;   Ronetix
;   
;   Supported devices   : PXA255
;	Supported board		: Custom GAME board	
;
;   Revision            : 1.4
;
;   Date                : August 25, 2006
;
; The file is delivered "AS IS" without warranty or condition of any
; kind, either express, implied or statutory. This includes without
; limitation any warranty or condition with respect to merchantability or
; fitness for any particular purpose, or against the infringements of
; intellectual property rights of others.
;
;--------------------------------------------------------------------------

;--------------------------------------------------------------------------
; The following section contains licenses that are required for PEEDI to
; operate. These licenses must be filled before using this file.
; The [LICENSE] section may contain license keys for one or more PEEDIs.
;
;   Example:
;       [LICENSE]
;       KEY         = UPDATE_24MAY2010, 1111-1111-1111-1
;       KEY         = XXXXX, 2222-2222-2222-2
;
; The [LICENSE] section may point to an external file which contains
; license keys for one or more PEEDIs. The external file must include 
; the text [LICENSE] followed by all keys.
;
;   Example:
;		[LICENSE]
;		FILE = tftp://192.168.3.1/license.txt
;		or
;		FILE=eep:license.txt 
;		or 
;		FILE = ftp://user:password@192.168.3.1/license.txt
;
;
; PEEDI is shipped with license keys stored in "eep:license.txt" and 
; printed on a label on the bottom side of PEEDI.
;
[LICENSE]
FILE=eep:license.txt
;--------------------------------------------------------------------------
[DEBUGGER]
PROTOCOL    = gdb_remote   ; gdb remote
REMOTE_PORT = 2000         ; TCP/IP port

[TARGET]
PLATFORM    = XScale        ; platform is XScale

[PLATFORM_XSCALE]
JTAG_CHAIN  = 5             ; list of IR length of all TAP controller in JTAG chain
JTAG_CLOCK  = 1000, 16000   ; JTAG Clock in [kHz] 1MHz JTAG clock for init
                            ; operations and 20MHz for normal work
TRST_TYPE   = OPENDRAIN     ; type of TRST output: OPENDRAIN or PUSHPULL
RESET_TIME  = 20            ; length of RESET pulse in ms; 0 means no RESET
WAKEUP_TIME = 0

CORE0                   = XScale,0          ; TAP is XSCALE CPU
CORE0_STARTUP_MODE      = RESET             ; Stop core
CORE0_BREAKMODE         = soft              ; breakpoint mode:
CORE0_INIT              = INIT_FMS_RAM      ; init section for FMS board
CORE0_FLASH0            = NOR_FLASH   		; flash section parameters
CORE0_ENDIAN            = LITTLE            ; core is little endian
CORE0_WORKSPACE    		= 0xA0000000, 0x10000 ; workspace for flash programmer

CORE0_DEBUG_HANDLER_ADDR= 0xFFFFF800        ; debug handler base address
CORE0_VECTOR_CATCH_MASK = 0x10              ; catch data abort exceptions
CORE0_VECTOR_UNDEF      = AUTO
CORE0_VECTOR_SWI        = AUTO
CORE0_VECTOR_PABORT     = AUTO
CORE0_VECTOR_DABORT     = AUTO
CORE0_VECTOR_RES        = AUTO
CORE0_VECTOR_IRQ        = AUTO
CORE0_VECTOR_FIQ        = AUTO
CORE0_RELOCATED_UNDEF   = AUTO
CORE0_RELOCATED_SWI     = AUTO
CORE0_RELOCATED_PABORT  = AUTO
CORE0_RELOCATED_DABORT  = AUTO
CORE0_RELOCATED_RES     = AUTO
CORE0_RELOCATED_IRQ     = AUTO
CORE0_RELOCATED_FIQ     = AUTO

CORE0_FILE              = "myfile.bin", BIN, 0xA0000000 ; default file
CORE0_PATH              = "tftp://192.168.3.60" 		; default path

[INIT_FMS_RAM]
memory write 0x48000008 0x59D822B2          ; MSC0 = 0x59D822B2
memory read 0x48000008                      ; read MSC0
memory write 0x4800000C 0x53802980          ; MSC1 = 0x53802980
wait  10
memory write 0x48000010 0x29807FD9          ; MSC2 = 0x29807FD9
wait  10
memory write 0x48000004 0x00000018          ; MDREFR = 0x00000018
memory write 0x4800001C 0x00000000          ; SXCNFG = 0x00000000
memory write 0x48000004 0x00010018          ; MDREFR = 0x00010018
wait  10
memory write 0x48000004 0x0009C030          ; MDREFR = 0x000BC018
memory write 0x48000000 0x00000BA0          ; MDCNFG = 0x00000BA0
wait  100
memory write 0x48000000 0x00000BA1          ; MDCNFG = 0x00000BA1
memory write 0x48000040 0x00220032          ; MDMRS = 0x00220032

[NOR_FLASH]
CHIP                    = CFI_FLASH 
;CHIP                    = 28F128J3

ACCESS_METHOD           = AGENT
CHECK_ID                = YES               ; check chip ID
CHIP_WIDTH              = 16                ; chip is in 16 bit configuration
CHIP_COUNT              = 2                 ; 2 chips
BASE_ADDR               = 0                 ; chip is mapped at 0x0000000
FILE                    = "test512k.bin", BIN, 0 ; file to program
AUTO_ERASE              = NO               ; erase before program
AUTO_LOCK               = NO                ; lock after program

[SERIAL]                                    ; serial port configuration
BAUD                    = 115200
STOP_BITS               = 1
PARITY                  = NONE
TCP_PORT                = 0

[TELNET]
PROMPT                  = "pxa255> "     ; telnet prompt
;BACKSPACE              = 127               ; comment out for autodetect

[DISPLAY]
BRIGHTNESS              = 20                ; LED indicator brightness
VOLUME                  = 25                ; beeper volume

[ACTIONS]                                   ; user defined scripts
;AUTORUN=1
1 = prog