;-------------------------------------------------------------------------- ; ; ; PEEDI target configuration file for PXA270 processor ; ; Ronetix ; ; Supported devices : PXA270 ; Board : Custom 4x boards ; ; Revision : 1.0 ; ; Date : Feb 1, 2016 ; ; The file is delivered "AS IS" without warranty or condition of any ; kind, either express, implied or statutory. This includes without ; limitation any warranty or condition with respect to merchantability or ; fitness for any particular purpose, or against the infringements of ; intellectual property rights of others. ; ;-------------------------------------------------------------------------- ;-------------------------------------------------------------------------- ; The following section contains licenses that are required for PEEDI to ; operate. These licenses must be filled before using this file. ; The [LICENSE] section may contain license keys for one or more PEEDIs. ; ; Example: ; [LICENSE] ; KEY = UPDATE_24MAY2010, 1111-1111-1111-1 ; KEY = XXXXX, 2222-2222-2222-2 ; ; The [LICENSE] section may point to an external file which contains ; license keys for one or more PEEDIs. The external file must include ; the text [LICENSE] followed by all keys. ; ; Example: ; [LICENSE] ; FILE = tftp://192.168.3.1/license.txt ; or ; FILE=eep:license.txt ; or ; FILE = ftp://user:password@192.168.3.1/license.txt ; ; ; PEEDI is shipped with license keys stored in "eep:license.txt" and ; printed on a label on the bottom side of PEEDI. ; [LICENSE] FILE = eep:license.txt [DEBUGGER] PROTOCOL = gdb_remote ; gdb remote REMOTE_PORT = 2000 ; TCP/IP port [TARGET] PLATFORM = XScale ; platform is ARM [PLATFORM_XSCALE] JTAG_CHAIN = AUTO x 7 JTAG_CLOCK = 100, 16000 JTAG_TDO_DELAY = 5 TRST_TYPE = PUSHPULL RESET_TIME = 200 WAKEUP_TIME = 50 TIME_AFTER_RESET = 300 ; min 300ms, because maybe the RST is not bidirectional CORE0 = XScale, 0 CORE0_STARTUP_MODE = reset CORE0_INIT = INIT_PXA270 CORE0_FLASH0 = FLASH_P30 CORE0_BREAKMODE = soft CORE0_ENDIAN = little CORE0_WORKSPACE_ADDR= 0x5c000000 CORE0_WORKSPACE_LEN = 0x10000 CORE0_PATH = "tftp://192.168.3.1" CORE0_USE_FAST_DOWNLOAD = Yes CORE0_DEBUG_HANDLER_ADDR= 0xfffff800 CORE0_VECTOR_UNDEF = AUTO CORE0_VECTOR_SWI = AUTO CORE0_VECTOR_PABORT = AUTO CORE0_VECTOR_DABORT = AUTO CORE0_VECTOR_RES = AUTO CORE0_VECTOR_IRQ = AUTO CORE0_VECTOR_FIQ = AUTO CORE0_RELOCATED_RES = AUTO CORE0_RELOCATED_UNDEF = AUTO CORE0_RELOCATED_SWI = AUTO CORE0_RELOCATED_PABORT = AUTO CORE0_RELOCATED_DABORT = AUTO CORE0_RELOCATED_IRQ = AUTO CORE0_RELOCATED_FIQ = AUTO CORE1 = XScale, 1 CORE1_STARTUP_MODE = RESET CORE1_INIT = INIT_PXA270 CORE1_FLASH0 = FLASH_P30 CORE1_BREAKMODE = soft CORE1_ENDIAN = little CORE1_WORKSPACE_ADDR = 0x5c000000 CORE1_WORKSPACE_LEN = 0x10000 CORE1_PATH = "tftp://192.168.3.1" CORE1_USE_FAST_DOWNLOAD = Yes CORE1_DEBUG_HANDLER_ADDR= 0xfffff800 CORE1_VECTOR_UNDEF = AUTO CORE1_VECTOR_SWI = AUTO CORE1_VECTOR_PABORT = AUTO CORE1_VECTOR_DABORT = AUTO CORE1_VECTOR_RES = AUTO CORE1_VECTOR_IRQ = AUTO CORE1_VECTOR_FIQ = AUTO CORE1_RELOCATED_UNDEF = AUTO CORE1_RELOCATED_SWI = AUTO CORE1_RELOCATED_PABORT = AUTO CORE1_RELOCATED_DABORT = AUTO CORE1_RELOCATED_RES = AUTO CORE1_RELOCATED_IRQ = AUTO CORE1_RELOCATED_FIQ = AUTO CORE2 = XScale, 2 CORE2_STARTUP_MODE = RESET CORE2_INIT = INIT_PXA270 CORE2_FLASH0 = FLASH_P30 CORE2_BREAKMODE = soft CORE2_ENDIAN = little CORE2_WORKSPACE_ADDR = 0x5c000000 CORE2_WORKSPACE_LEN = 0x10000 CORE2_PATH = "tftp://192.168.3.1" CORE2_USE_FAST_DOWNLOAD = Yes CORE2_DEBUG_HANDLER_ADDR= 0xfffff800 CORE2_VECTOR_UNDEF = AUTO CORE2_VECTOR_SWI = AUTO CORE2_VECTOR_PABORT = AUTO CORE2_VECTOR_DABORT = AUTO CORE2_VECTOR_RES = AUTO CORE2_VECTOR_IRQ = AUTO CORE2_VECTOR_FIQ = AUTO CORE2_RELOCATED_UNDEF = AUTO CORE2_RELOCATED_SWI = AUTO CORE2_RELOCATED_PABORT = AUTO CORE2_RELOCATED_DABORT = AUTO CORE2_RELOCATED_RES = AUTO CORE2_RELOCATED_IRQ = AUTO CORE2_RELOCATED_FIQ = AUTO CORE3 = XScale, 3 CORE3_STARTUP_MODE = RESET CORE3_INIT = INIT_PXA270 CORE3_FLASH0 = FLASH_P30 CORE3_BREAKMODE = soft CORE3_ENDIAN = little CORE3_WORKSPACE_ADDR = 0x5c000000 CORE3_WORKSPACE_LEN = 0x10000 CORE3_PATH = "tftp://192.168.3.1" CORE3_USE_FAST_DOWNLOAD = Yes CORE3_DEBUG_HANDLER_ADDR= 0xfffff800 CORE3_VECTOR_UNDEF = AUTO CORE3_VECTOR_SWI = AUTO CORE3_VECTOR_PABORT = AUTO CORE3_VECTOR_DABORT = AUTO CORE3_VECTOR_RES = AUTO CORE3_VECTOR_IRQ = AUTO CORE3_VECTOR_FIQ = AUTO CORE3_RELOCATED_UNDEF = AUTO CORE3_RELOCATED_SWI = AUTO CORE3_RELOCATED_PABORT = AUTO CORE3_RELOCATED_DABORT = AUTO CORE3_RELOCATED_RES = AUTO CORE3_RELOCATED_IRQ = AUTO CORE3_RELOCATED_FIQ = AUTO [INIT_PXA270] ; setup PLL core@312MHz, mem@104MHz memory write 0x41300000 0x00000190 ; CCSR memory write 0x41300008 0x00000002 ; OSCC set cp14 0x1006 0x0000000B ; cp14 memory write 0x48000004 0x0001801e ; MDREFR ;clock normal ;WCP15 0x010F 0x00002001 ;Enable CP0 and CP13 access set cp15 0x110F 0x00002001 ; ; setup GPIOp memory write 0x40E00018 0x10001008 ;GPSR0 memory write 0x40E00024 0xEFFFEFF7 ;GPCR0 memory write 0x40E0000C 0x90225408 ;GPDR0 memory write 0x40E00054 0x00100000 ;GAFR0_L memory write 0x40E00058 0x00000000 ;GAFR0_H memory write 0x40E0001C 0x31060000 ;GPSR1 memory write 0x40E00028 0xCEF9FFFF ;GPCR1 memory write 0x40E00010 0x31CEAB81 ;GPDR1 memory write 0x40E0005C 0x69989152 ;GAFR1_L memory write 0x40E00060 0x00000000 ;GAFR1_H memory write 0x40E00020 0x00060000 ;GPSR2 memory write 0x40E0002C 0xFFF9FFFF ;GPCR2 memory write 0x40E00014 0x00560000 ;GPDR2 memory write 0x40E00064 0x00000000 ;GAFR2_L memory write 0x40E00068 0x01000000 ;GAFR2_H memory write 0x40E00118 0x00000000 ;GPSR3 memory write 0x40E00124 0xFFFFFFFF ;GPCR3 memory write 0x40E0010C 0x0003000C ;GPDR3 memory write 0x40E0006C 0x54000000 ;GAFR3_L memory write 0x40E00070 0x00000001 ;GAFR3_H memory write 0x40F00004 0x00000030 ;PSSR memory write 0x40F00008 0x5040ffff ;PSPR ; setup Flash and Sram memory write 0x48000008 0x0000128A ;MSC0 memory read 0x48000008 memory write 0x48000028 0x0001c391 ;MCMEM0 memory write 0x4800002C 0x0001c391 ;MCMEM1 memory write 0x48000030 0x0001c391 ;MCATT0 memory write 0x48000034 0x0001c391 ;MCATT1 memory write 0x48000038 0x0001c391 ;MCIO0 memory write 0x4800003C 0x0001c391 ;MCIO1 memory write 0x48000020 0x00000000 ;FLYCNFG ; setup SDRAM at 0xA0000000 memory write 0x48000004 0x0142001e ;MDREFR memory write 0x48000004 0x0042001e ;MDREFR memory write 0x4800001C 0x40044004 ;SXCNFG memory write 0x48000004 0x0043001e ;MDREFR memory read 0x48000004 memory write 0x48000004 0x0003001e ;MDREFR memory read 0x48000004 memory write 0x48000004 0x0003801e ;MDREFR memory read 0x48000004 memory write 0x48000000 0x080009A8 ;MDCNFG memory read 0x48000000 memory write 0x48000000 0x080009A9 ;MDCNFG memory read 0x48000000 wait 20 ; step 7 - Trigger 8 SDRAM refresh cycles - errata 116 - first access is ignored memory write 0xA0000000 0xA0000000 ;access SDRAM memory write 0xA0000000 0xA0000000 ;access SDRAM memory write 0xA0000000 0xA0000000 ;access SDRAM memory write 0xA0000000 0xA0000000 ;access SDRAM memory write 0xA0000000 0xA0000000 ;access SDRAM memory write 0xA0000000 0xA0000000 ;access SDRAM memory write 0xA0000000 0xA0000000 ;access SDRAM memory write 0xA0000000 0xA0000000 ;access SDRAM memory write 0xA0000000 0xA0000000 ;access SDRAM memory read 0xA0000000 ;read SDRAM memory write 0x48000040 0x00000000 ;MDMRS ;WGPR 11 0xA3000020 ;set frame pointer to free RAM set r11 0xA3000020 memory write 0xA3000020 0xA3000028 ;dummy stack frame for GDB [TELNET] PROMPT = "c4> " [FLASH_P30] CHIP = CFI_FLASH ; flash chip ACCESS_METHOD = AGENT ; program method auto CHECK_ID = YES ; check chip ID CHIP_WIDTH = 16 ; chip is in 16 bit configuration CHIP_COUNT = 1 ; one chip is used BASE_ADDR = 0 ; chip is mapped at 0x0000000 FILE = "test256k.bin", BIN, 0 AUTO_ERASE = NO ; erase before program AUTO_LOCK = NO ; lock after program [SERIAL] BAUD=115200 STOP_BITS=1 PARITY=NONE TCP_PORT=0 ;2023 [DISPLAY] BRIGHTNESS=50 VOLUME=100