;-------------------------------------------------------------------------- ; ; ; PEEDI target configuration file for PXA320 processor ; ; Ronetix ; ; Supported devices : PXA320 ; ; Board : Toradex Colibri PXA320 board ; U-boot and WinCE pre-installed ; ; Revision : 1.2 ; ; Date : May 5, 2010 ; ; The file is delivered "AS IS" without warranty or condition of any ; kind, either express, implied or statutory. This includes without ; limitation any warranty or condition with respect to merchantability or ; fitness for any particular purpose, or against the infringements of ; intellectual property rights of others. ; ;-------------------------------------------------------------------------- ;-------------------------------------------------------------------------- ; The following section contains licenses that are required for PEEDI to ; operate. These licenses must be filled before using this file. ; The [LICENSE] section may contain license keys for one or more PEEDIs. ; ; Example: ; [LICENSE] ; KEY = UPDATE_24MAY2010, 1111-1111-1111-1 ; KEY = XXXXX, 2222-2222-2222-2 ; ; The [LICENSE] section may point to an external file which contains ; license keys for one or more PEEDIs. The external file must include ; the text [LICENSE] followed by all keys. ; ; Example: ; [LICENSE] ; FILE = tftp://192.168.3.1/license.txt ; or ; FILE=eep:license.txt ; or ; FILE = ftp://user:password@192.168.3.1/license.txt ; ; ; PEEDI is shipped with license keys stored in "eep:license.txt" and ; printed on a label on the bottom side of PEEDI. ; [LICENSE] FILE=eep:license.txt ;-------------------------------------------------------------------------- [DEBUGGER] PROTOCOL = gdb_remote ; gdb remote REMOTE_PORT = 2000 ; TCP/IP port [TARGET] PLATFORM = XScale ; platform is XScale [PLATFORM_XSCALE] JTAG_CHAIN = 11 ; list of IR length of all TAP controller in JTAG chain JTAG_CLOCK = 1000, 16000 ; JTAG Clock in [kHz] - 1MHz JTAG clock for init ; operations and 16MHz for normal work TRST_TYPE = PUSHPULL ; type of TRST output: OPENDRAIN or PUSHPULL RESET_TIME = 20 ; length of RESET pulse in ms; 0 means no RESET WAKEUP_TIME = 30 TIME_AFTER_RESET = 2500 ; delay afer RST is released CORE0 = PXA320, 0 ; TAP is PXA320 CPU CORE0_STARTUP_MODE = RESET ; Stop core CORE0_BREAKMODE = SOFT ; breakpoint mode: CORE0_INIT = INIT_PXA320 ; init section for board CORE0_FLASH = NAND_FLASH ; FLASH is NAND CORE0_ENDIAN = LITTLE ; core is little endian CORE0_VECTOR_CATCH_MASK = 0x00 ; catch data abort exceptions CORE0_WORKSPACE = 0x5C020000, 0x20000 ; workspace for FLASH programmer CORE0_FILE = "myfile.bin", BIN, 0x00400000 ; default file CORE0_PATH = "tftp://192.168.3.1" ; default path [INIT_PXA320] break add hard 0x5E00440c ; set break in ROM code go ; let the ROM code init NAND controller wait 5000 stop ; wait for break [NAND_FLASH] CHIP = NAND_FLASH CPU = PXA3XX OOB_INFO = PXA_ECC FILE = test.bin, 0 [SERIAL] ; serial port configuration BAUD = 115200 STOP_BITS = 1 PARITY = NONE TCP_PORT = 0 [TELNET] PROMPT = "pxa320> " ; telnet prompt ;BACKSPACE = 127 ; comment out for autodetect [DISPLAY] BRIGHTNESS = 20 ; LED indicator brightness VOLUME = 25 ; beeper volume